Display Driver Signal Control for Scan-Synchronized Image Transmission
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Solution Overview
Problem
Existing electronic devices face challenges in efficiently managing image transmission to display panels, leading to reduced display quality due to unnoticeable scans by processors, which can result in partial display of subsequent images during ongoing image scans.
Innovation Solution
Implementing a display driver circuit with a graphic random access memory (GRAM) that manages image transmission by changing signal states to enable or disable image transmission based on event types, including scans with and without GRAM usage, to synchronize with processor commands and refresh rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the display driver circuit continuously transmits images to the display panel, then display quality is maintained, but partial image display occurs during scan operations
Solution Approach 1:
The display driver circuit changes the signal state to a second state before the scan starts, ensuring the processor knows to pause image transmission. This preliminary action prevents partial image display by establishing the disabled state in advance, before the scan operation begins to interfere with ongoing image transmission.
Solution Approach 2:
The display driver circuit provides feedback to the processor through signal state changes (first state for enabled, second state for disabled). This feedback mechanism allows the processor to adjust its image transmission timing based on the scan operation status, preventing partial display by synchronizing transmission with safe time windows.
2Reliability
If the display driver circuit disables image transmission during scan, then partial display issues are reduced, but image transmission efficiency decreases
Solution Approach 1:
The display driver circuit operates in periodic cycles, alternating between enabling and disabling signal states based on scan timing. By periodically disabling transmission only during scan periods and enabling it during safe windows, the system maintains display quality while maximizing transmission efficiency during available time windows.
Solution Approach 2:
The signal state dynamically changes between first state (enabled) and second state (disabled) based on real-time scan operations. This dynamic adjustment allows the system to adapt transmission behavior to current operational conditions, blocking transmission only when necessary during scans while maintaining high efficiency during non-scan periods.
3Reliability
If the display driver circuit synchronizes with processor commands, then service quality is maintained, but timing precision requirements increase
Solution Approach 1:
The display driver circuit uses feedback signal state changes to communicate its operational status to the processor. This feedback mechanism simplifies synchronization by using clear discrete states (enabled/disabled) rather than requiring complex continuous timing adjustments, maintaining service quality while reducing timing precision requirements.
Solution Approach 2:
The display driver circuit performs preliminary signal state changes before scan operations begin, giving the processor advance notice to adjust transmission timing. This preliminary action creates clear timing boundaries that are easier to synchronize with processor commands, reducing the precision requirements for real-time timing coordination.
Data Source
AI summary
An electronic device is provided. The electronic device includes a processor. The electronic device includes a display including a display panel and a display driver circuit that includes memory. The display driver circuit is configured to identify an event for a display on the display panel. The display driver circuit is configured to, in response to the event of a first type that executes the display through the memory, change, at a timing before a reference time from a start timing of a scan for the display, a state of a signal provided from the display driver circuit to the processor from a first state indicating to enable an image transmission to the display driver circuit to a second state indicating to disable the image transmission. The display driver circuit is configured to, in response to the event of a second type that executes the display by bypassing the memory, change, at the start timing, the state of the signal provided from the display driver circuit to the processor from the first state to the second state.