Multi-function Display Driver Shared Back Channel Clock Data
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Solution Overview
Problem
Existing display driver ICs face challenges in efficiently managing clock synchronization and data transmission across multiple source drivers, particularly in handling unlocked clock states and data read operations, which can be disrupted by events like Electro-Static Discharge (ESD) and require complex signal management.
Innovation Solution
The implementation of multi-function drivers that operate in two modes, using a shared back channel signal line in a wired-OR configuration to manage clock synchronization and data transmission, with a timing controller providing training clocks and read enable signals to ensure all drivers are synchronized and data is transmitted correctly, even during ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a shared back channel is used for clock status signaling, then the number of signal lines is reduced, but the ability to transmit data is limited
Solution Approach 1:
The shared back channel is designed to perform multiple functions: it can transmit clock lock status signals (first mode of operation) and data signals (second mode of operation). The multi-function drivers can selectively output either clock status or data based on control signals, allowing a single signal line to serve dual purposes and reducing overall system complexity while maintaining versatility
Solution Approach 2:
The system dynamically switches the function of the shared back channel between clock status signaling and data transmission based on operational mode. Control signals (read enable signals) dynamically configure the drivers to output different types of information, allowing the system to adapt its behavior to different operational requirements without needing separate dedicated channels
2Device complexity
If multi-function drivers are used to share the back channel, then device complexity is reduced, but the reliability during ESD events deteriorates
Solution Approach 1:
The system performs preliminary clock training and synchronization before normal data transmission begins. The timing controller provides training clocks to drivers in advance, allowing them to lock onto the clock signal and establish proper synchronization before handling data operations, ensuring reliable operation even in the presence of ESD events
Solution Approach 2:
The shared back channel provides feedback from drivers to the timing controller regarding clock lock status. This feedback mechanism allows the timing controller to monitor synchronization state and adjust training clocks accordingly, ensuring that drivers maintain proper clock synchronization and can recover from ESD-induced disruptions
Data Source
AI summary
Display driver circuits include a multi-function driver, which is configured to support first and second modes of operation. The multi-function driver supports the first mode of operation in response to a first control signal by driving a bus with an output signal, which has a value that indicates a locked or unlocked status of a clock signal therein. The multi-function driver also supports the second mode of operation in response to a second control signal by driving the bus with multi-bit data that is unrelated to the locked or unlocked status of the clock signal.