Display Data Driving Circuit Using Single-Line Signal Merging

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Solution Overview

Problem

Existing data driving circuits require separate lines for transferring clock and control signals, which can lead to electromagnetic interference (EMI) and increase the complexity of signal transmission.

Innovation Solution

A data driving circuit and method that generate clock and control signals from a reception signal containing clock information, mode information, and data, eliminating the need for dedicated lines for these signals by using a clock generator, sampler, and signal controller to determine and process the control and data information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate lines are used for transferring clock and control signals to the data driving circuit, then reliable signal transmission is achieved, but the number of signal lines increases and electromagnetic interference occurs

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidnumber of signal lines
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges clock signals, control signals, and data signals into a single reception signal transmitted through one line. The data driving circuit includes a sampler that extracts these different signal types from the combined reception signal based on sampling timing, eliminating the need for separate transmission lines while maintaining signal integrity and reducing electromagnetic interference.

Inventive Principle:
Principle #5Merging (Combining)

2Stability of the object's composition

If separate lines are used for transferring clock and control signals, then signal transmission stability is maintained, but electromagnetic interference increases

Engineering Contradiction:
Improvesignal transmission stabilityVSAvoidelectromagnetic interference
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

By combining multiple signals into one transmission line, the patent reduces the total number of conductors that could potentially generate electromagnetic interference. The single reception signal carries all necessary information (clock, control, and data) without the mutual interference that would occur between multiple adjacent signal lines.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If a single line is used to transfer all signals, then the number of signal lines is reduced and EMI is minimized, but signal processing complexity increases

Engineering Contradiction:
Improvenumber of signal linesVSAvoidsignal processing complexity
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The data driving circuit segments the combined reception signal into distinct components (clock signal, control signal, and data signal) using a sampler that operates at specific timing intervals. This segmentation allows the circuit to process each signal type independently despite their combined transmission, managing the processing complexity through structured temporal separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sampler acts as an intermediary component that receives the combined reception signal and extracts individual signal components based on sampling timing. This intermediary structure simplifies the overall processing by providing a systematic method to separate and route different signal types to their respective processing units within the data driving circuit.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20100156882A1Data driving circuit, display apparatus, and data driving method
Publication Date: 2010.06.24 ANAPASS
  • US20100156882A1 patent drawing
  • US20100156882A1 patent drawing
  • US20100156882A1 patent drawing

AI summary

Provided are a data driving circuit, a display device, and a data driving method. The data driving circuit includes a clock generator configured to generate a clock signal from clock information included in a reception signal including the clock information, mode information and a body, a sampler configured to sample the reception signal according to the clock signal to obtain the mode information and the body that includes at least one of control information and data, a signal controller configured to determine whether or not the body corresponds to the control information with reference to the mode information, and generate a control signal corresponding to the control information according to a result of the determination, and a data driver configured to generate a data signal corresponding to the data according to the control signal.