Display Driver Source Amplifier Parallel Unit Circuits
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Solution Overview
Problem
Existing display drivers struggle to achieve high scan rates due to limitations in the slew rate of grayscale voltages output by source amplifiers, which affects the performance and efficiency of display panels.
Innovation Solution
The proposed display driver includes a source amplifier with an input stage and an output stage, where the output stage comprises multiple unit circuits connected in parallel, each including a buffer switch and an output buffer. This configuration reduces the total resistance and improves the slew rate of the grayscale voltage output to the display panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single unit circuit is used in the output stage, then the circuit design is simple, but the slew rate of the grayscale voltage is limited
Solution Approach 1:
The output stage is divided into multiple unit circuits (first unit circuit, second unit circuit, third unit circuit) that operate in parallel. Each unit circuit includes its own buffer switch and output buffer, allowing the grayscale voltage to be driven through multiple parallel paths, thereby increasing the overall current drive capability and slew rate without excessive complexity increase.
Solution Approach 2:
The patent employs dynamic control of buffer switches (first buffer switch, second buffer switch, third buffer switch) that selectively connect or disconnect unit circuits based on the required output voltage levels. This dynamic switching allows the circuit to optimize performance for different operating conditions, maintaining high slew rate while managing power consumption and circuit complexity.
2Productivity
If multiple unit circuits are connected in parallel, then the slew rate is improved, but the circuit complexity increases
Solution Approach 1:
The source amplifier is segmented into multiple functional units (first unit circuit, second unit circuit, third unit circuit) with dedicated buffer switches. This segmentation allows independent control of each unit's contribution to the output, enabling the system to achieve high scan rates through parallel operation while maintaining manageable structural complexity through modular design.
Solution Approach 2:
Each unit circuit serves multiple functions: providing current drive capability, buffering the grayscale voltage, and being selectively activated based on output requirements. This multi-functionality reduces the need for separate dedicated components, thereby increasing productivity (scan rate) without proportionally increasing circuit complexity.
3Speed
If the output stage uses multiple parallel unit circuits, then the response speed is enhanced, but the circuit area increases
Solution Approach 1:
The dynamic buffering mechanism allows the circuit to activate only the necessary number of unit circuits based on the required response speed and voltage levels. During high-speed transitions, multiple unit circuits operate in parallel to enhance response speed, while during steady-state operation, fewer unit circuits are active, reducing the effective circuit area occupied.
Solution Approach 2:
By segmenting the output stage into discrete unit circuits with independent buffer switches, the design allows for optimized layout and routing of each unit. This segmentation enables better space utilization and reduces the overall circuit area compared to a single large unit circuit that would provide equivalent current drive capability.
Data Source
AI summary
A display driver is provided. The display driver includes: a plurality of source amplifiers connected to a plurality of source lines of a display panel, wherein one of the plurality of source amplifiers includes an input stage and an output stage configured to output a grayscale voltage to a source line of the plurality of source lines; and a decoder circuit configured to provide at least one of a plurality of gamma voltages to the input stage based on image data. The output stage includes a plurality of unit circuits connected to each other in parallel between the input stage and an output pad connected to the source line. Each of the plurality of unit circuits includes a buffer switch and an output buffer connected to the input stage, and is connected to the output pad through a resistor.