Display Driver Timing Compensation for RC Delay
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Display apparatuses face challenges in compensating for scan delay, particularly in high-resolution displays where RC delay affects data charge margin, leading to inefficiencies in data signal transmission.
Innovation Solution
The implementation of a display apparatus with multiple data driver circuits that sequentially output data signals through all output channels, utilizing a timing controller to provide a delay difference between output signals, and generating internal clock signals based on external clock signals and feedback signals to compensate for RC delay, ensuring synchronized data signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple data driver circuits are used to drive high-resolution displays, then the display resolution is improved, but RC delay increases causing data charge margin reduction
Solution Approach 1:
The patent applies preliminary action by calculating the RC delay value in advance and using this pre-calculated value to generate appropriate delay differences for each data driver circuit. The timing controller pre-determines the delay characteristics and compensates for them before data transmission, ensuring that data signals arrive at the display panel at the correct timing despite varying RC delays across multiple data lines.
Solution Approach 2:
The patent changes the timing parameters of data signals by introducing delay differences based on calculated RC delay values. Each data driver circuit is assigned a specific delay difference that compensates for its particular RC delay characteristics, thereby adjusting the timing parameters to maintain optimal data charge margins across all data lines in high-resolution displays.
2Speed
If data signals are transmitted through multiple data driver circuits simultaneously, then transmission speed is improved, but timing synchronization deteriorates due to RC delay variations
Solution Approach 1:
The patent applies local quality by assigning different delay differences to different data driver circuits based on their specific RC delay characteristics. Each data driver circuit receives a customized timing adjustment tailored to its local electrical characteristics, ensuring that despite simultaneous transmission, all data signals are synchronized at the display panel by compensating for local variations in RC delay.
Solution Approach 2:
The patent uses feedback by calculating RC delay values based on the actual electrical characteristics of each data line and using this feedback information to adjust the timing of data signals. The system measures or calculates the RC delay and uses this information to generate appropriate delay differences, creating a closed-loop timing synchronization mechanism that ensures all data signals arrive simultaneously at the display panel.
Data Source
AI summary
A display apparatus includes a display panel including a plurality of data lines and a plurality of scan lines crossing the plurality of data lines, the plurality of data lines including a plurality of first data lines and a plurality of second data lines, a scan driver configured to sequentially output a plurality of scan signals to the plurality of scan lines, a first data driver circuit configured to sequentially output a plurality of first data signals to the plurality of first data lines, and a second data driver circuit configured to sequentially output a plurality of second data signals to the plurality of second data lines based on a feedback signal received from the first data driver circuit.