Display Driver Timing Staggering for Vertical Line Noise Control
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Solution Overview
Problem
TFT liquid crystal display devices face issues with large differences in operation timings between amplifier circuits, leading to abnormal display of vertical lines, and simultaneous operation of amplifier circuits causing reduced noise mitigation and deteriorated image quality.
Innovation Solution
A driver with multiple amplifier circuits, a control circuit, and delay portions that sequentially output control signals to two groups of amplifier circuits, with one group operating half the time of the other, ensuring staggered operation and preventing simultaneous operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple amplifier circuits operate simultaneously, then productivity is improved, but noise is generated in power supply lines and signal lines
Solution Approach 1:
The patent divides the N amplifier circuits into two groups: a first amplifier circuit group (amplifier circuits 36-1 to 36-(N/2)) and a second amplifier circuit group (amplifier circuits 36-(N/2)+1 to 36-N). Each group operates at different timings controlled by separate control signals, preventing simultaneous operation and reducing noise in power supply lines and signal lines while maintaining overall productivity.
2Object-generated harmful factors
If amplifier circuits operate with large time difference, then noise is reduced, but abnormal display of vertical lines occurs
Solution Approach 1:
The patent segments the amplifier circuits into two groups that operate at different timings. The first group operates during a first period and the second group operates during a second period, creating a time difference that reduces noise while preventing abnormal vertical line display through controlled sequential operation.
Solution Approach 2:
The patent implements periodic action by alternating between two operation periods: a first period when the first amplifier circuit group operates, and a second period when the second amplifier circuit group operates. This periodic switching ensures that amplifier circuits do not operate simultaneously, reducing noise while maintaining display quality through systematic timing control.
3Ease of operation
If delay circuits are connected in series, then operation timing is staggered, but device complexity increases
Solution Approach 1:
Instead of using N-1 delay circuits connected in series for N amplifier circuits, the patent segments the amplifier circuits into two groups and uses a simplified delay circuit configuration. This reduces device complexity while achieving the required operation timing stagger through group-based control.
Solution Approach 2:
The patent merges the control of multiple amplifier circuits into two groups, where each group is controlled by a single control signal path. This combining approach reduces the number of delay circuits needed from N-1 to a manageable configuration, simplifying the overall circuit while maintaining staggered operation timing.
Data Source
AI summary
A driver includes a plurality of amplifier circuits which outputs a plurality of gradation voltages to a display portion according to a control signal, a control circuit which outputs the control signal, and a delay portion which sequentially supplies the control signal to amplifier circuits in a first amplifier circuit group, and which sequentially supplies a delayed control signal to amplifier circuits in a second amplifier circuit group other than the first amplifier circuit group, the delayed control signals obtained by delaying the control signal by a certain delay time.