Display Driving Circuit Parasitic Capacitor Discharge Control
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Solution Overview
Problem
Current LED display technologies face challenges in achieving uniformity and preventing color deviation, particularly at low grayscale levels due to the incomplete discharge of parasitic capacitors during row scanning, which affects the brightness and color accuracy of light-emitting diodes.
Innovation Solution
A display driving circuit incorporating a first and second timing controller and a selector circuit that controls the connection between the reference voltage and data lines to manage the discharge of parasitic capacitors, ensuring that the current for light-emitting pixels is consistent and complete, thereby preventing color deviation and improving display uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If row scanning is performed using conventional timing control, then the scanning speed and productivity are maintained, but color deviation and brightness uniformity deteriorate at low grayscale levels due to incomplete parasitic capacitor discharge
Solution Approach 1:
The patent applies preliminary action by performing parasitic capacitor discharge during the gap stage between adjacent row scanning operations. The selector circuit is configured to connect the reference voltage end to the data connection end during this intermediate period, enabling the parasitic capacitors to discharge completely before the next row scanning begins. This preliminary discharge action prevents color deviation and brightness non-uniformity while maintaining normal scanning speed during active row scanning.
2Measurement precision
If the parasitic capacitors are discharged during the scanning gap stage, then color accuracy and brightness uniformity are improved, but the timing control complexity increases
Solution Approach 1:
The patent introduces a selector circuit as an intermediary component that automatically switches the connection state between the reference voltage end and data connection end based on the scanning stage. During the gap stage between row scans, the selector circuit enables the connection to allow parasitic capacitor discharge. This intermediary mechanism simplifies the timing control by using automatic switching rather than complex manual timing coordination, while achieving precise color control through controlled discharge.
3Reliability
If the reference voltage end is continuously connected to the data connection end, then the parasitic capacitors can discharge completely, but the current consumption increases during active scanning
Solution Approach 1:
The patent implements periodic action by connecting the reference voltage end to the data connection end only during specific gap stages between adjacent row scanning operations, rather than continuously. The selector circuit is configured to enable this connection periodically during the intermediate periods when no row scanning is active, allowing parasitic capacitors to discharge completely. During active row scanning, the connection is disconnected to minimize current consumption, thus achieving brightness uniformity while controlling power usage.
Data Source
AI summary
The display driving circuit includes: a first timing controller, a second timing controller and a selector circuit having a first signal receiving end connected to the first timing controller and receiving a level signal therefrom, a second signal receiving end connected to the second timing controller and receiving a level signal therefrom, a data connection end connected to a data line and output a level signal thereon to the data line, and a reference voltage end. The selector circuit is configured to choose to, in a row scanning stage, control the reference voltage end and the data connection end to be connected in response to the level signal from the first timing controller; and at least choose to, in a two-adjacent-row scanning gap stage, control them to be connected in response to the level signal from the second timing controller.