Display Driving Circuit Frame Area Reduction
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Solution Overview
Problem
Existing display devices face challenges in minimizing the area of the frame region surrounding the display region, particularly as the vertical arrangement of gate and source signal line driving circuits increases the frame area, making it difficult to reduce the overall frame area effectively.
Innovation Solution
The display device incorporates a configuration with gate lines and source lines extending in different directions, featuring a driving circuit with output terminal groups and lead-out lines that transmit signals, where the gate lead-out lines are bundled and arranged to avoid intersections with source lead-out lines, and are connected via insulating films to reduce resistance and prevent capacitance, allowing for efficient signal transmission and reduced frame area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If gate signal line driving circuit and source signal line driving circuit are arranged parallel to each other on one side of the display region, then the area of the frame region in the lateral direction is decreased, but the area of the frame region in the vertical direction is increased
Solution Approach 1:
The patent transitions from a conventional one-sided arrangement to a two-sided arrangement of driving circuits, utilizing both lateral sides of the display region. This dimensional change allows the frame area to be reduced without increasing vertical frame area, as the driving circuits are distributed across multiple sides rather than concentrated on one side.
Solution Approach 2:
The driving circuits are segmented into multiple independent units (gate signal line driving circuit and source signal line driving circuit) that can be arranged separately on different sides of the display region. This segmentation enables flexible placement that reduces overall frame area while maintaining functional independence of each driving circuit.
2Reliability
If gate lead-out lines and source lead-out lines are arranged to avoid intersecting, then wiring failures are reduced, but the device complexity increases
Solution Approach 1:
The patent utilizes three-dimensional space by arranging gate lead-out lines and source lead-out lines in different layers or spatial dimensions, allowing them to avoid intersections while maintaining electrical connectivity. This dimensional separation reduces wiring failures without requiring complex planar routing.
Solution Approach 2:
The patent introduces intermediary structures such as insulating films or barrier layers between lead-out lines to prevent unwanted intersections and electrical interference. These intermediaries allow the lead-out lines to be arranged closer together while maintaining reliability by preventing short circuits and signal interference.
Data Source
AI summary
Provided is a display device, including: a driving circuit including a first output terminal group including at least one gate signal output terminal, and a second output terminal group including at least one source signal output terminal; and a plurality of gate lead-out lines configured to transmit a gate signal to a plurality of gate lines, in which each of the plurality of gate lines is electrically connected to at least one of the gate lead-out lines, and the first output terminal group is arranged between two adjacent second output terminal groups.