Display Driving Circuit With Adaptive Clock Frequency Control

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Solution Overview

Problem

Existing display devices face challenges in efficiently adjusting the frequency of clock signals to match target frequencies due to environmental changes and operational conditions, leading to potential screen abnormalities like luminance changes and flicker.

Innovation Solution

A display driving circuit that includes a frequency variation determiner, calculator, and controller to adaptively adjust the clock signal frequency based on deviations from a reference frequency, using a stepwise approach to minimize the time required to reach the target frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the clock signal frequency is adjusted rapidly to match the target frequency, then the time required to reach the target frequency is reduced, but screen abnormalities such as luminance changes and flicker may occur

Engineering Contradiction:
Improvetime to reach target frequencyVSAvoidscreen abnormalities
Core Design Contradiction:
Loss of timeVSObject-affected harmful factors

Solution Approach 1:

The patent implements dynamic adjustment of clock signal frequency by transitioning from a fixed frequency approach to a variable frequency approach. The clock signal generator dynamically changes the frequency based on real-time comparison between current and target frequencies, allowing rapid convergence while maintaining display stability through controlled adjustment steps.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback mechanism where the current clock signal frequency is continuously measured and compared with the target frequency. Based on this comparison, the frequency adjustment amount is dynamically determined and applied in the next frame, creating a closed-loop control system that prevents overshooting and screen abnormalities while rapidly converging to the target frequency.

Inventive Principle:
Principle #23Feedback

2Stability of the object's composition

If the clock signal frequency is adjusted slowly to avoid screen abnormalities, then display stability is maintained, but the time required to reach the target frequency increases

Engineering Contradiction:
Improvedisplay stabilityVSAvoidtime to reach target frequency
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The system dynamically adapts the frequency adjustment strategy based on the current state. When the frequency deviation is large, larger adjustment steps are taken to reduce convergence time. When approaching the target frequency, smaller steps are taken to maintain stability, creating an optimal balance between speed and stability throughout the adjustment process.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the adjustment parameter (frequency variation amount) based on the current frequency deviation. The frequency variation determiner selects different adjustment magnitudes depending on how far the current frequency is from the target, allowing rapid initial convergence followed by fine-tuned stabilization to achieve both speed and accuracy.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12400570B2Display driving circuit, display device including the same, and method of driving display device
Publication Date: 2025.08.26 SAMSUNG DISPLAY CO LTD
  • US12400570B2 patent drawing
  • US12400570B2 patent drawing
  • US12400570B2 patent drawing

AI summary

A display driving circuit includes a clock signal generator which generates a clock signal at a frequency in response to a frequency control signal, a frequency variation determiner which adaptively changes a frequency variation of the clock signal, based on a magnitude of a deviation between the frequency of the clock signal and a target frequency calculated based on a reference clock signal supplied from the outside, and a frequency controller which generates the frequency control signal which updates the frequency of the clock signal, based on the frequency variation, and provides the frequency control signal to the clock signal generator.