Display Driving Circuit Interrupt Synchronization for Low-Power Flicker
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Solution Overview
Problem
In display systems operating in low-power mode, asynchronous timing between the host and display driving circuit can lead to flicker issues due to asynchronous data transmission and display timing, particularly when the host transmits image data at inappropriate times relative to the display panel's data provision period.
Innovation Solution
A display driving circuit that generates and controls interrupt signals to synchronize with the host, using a timing controller to manage a first interrupt signal for waking up the host and a second interrupt signal based on the light emission control signal, ensuring image data is transmitted during the display panel's data provision period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the host operates in low-power mode to reduce energy consumption, then power efficiency is improved, but timing synchronization between host and display driving circuit deteriorates causing flicker
Solution Approach 1:
The display driving circuit generates a first interrupt signal in advance to wake up the host before the data provision period begins. This preliminary action ensures the host is ready to transmit image data at the correct timing, preventing synchronization issues while allowing the host to remain in low-power mode during intervals when no data transmission is needed.
Solution Approach 2:
The timing controller monitors whether image data has been successfully received from the host and uses this feedback to control the level of the second interrupt signal. This feedback mechanism ensures continuous timing synchronization between the host and display driving circuit, adjusting interrupt signal levels based on actual data reception status to prevent flicker.
2Ease of operation
If the host transmits image data asynchronously to reduce interface operation complexity, then ease of operation is improved, but image quality deteriorates due to flicker
Solution Approach 1:
The timing controller acts as an intermediary between the host and display panel, managing interrupt signals that coordinate data transmission timing. This intermediary mechanism allows the host to operate with simplified interface logic while ensuring data is transmitted during the correct data provision period, maintaining image quality without complex synchronization requirements.
3Use of energy by moving object
If the display panel is driven at low frame rate to reduce power consumption, then energy efficiency is improved, but timing coordination between host and display driving circuit becomes more difficult
Solution Approach 1:
The timing controller generates interrupt signals at periodic intervals corresponding to the low frame rate of the display panel. The first interrupt signal wakes up the host periodically before each data provision period, and the second interrupt signal is controlled based on the periodic light emission control signal. This periodic action simplifies timing coordination at low frame rates by establishing regular, predictable interrupt patterns.
Data Source
AI summary
A display driving circuit for receiving image data from a host and driving a display panel, the display driving circuit including: an interface configured to receive the image data from the host; and a timing controller configured to control a first interrupt signal for waking up the host in a low-power mode and to control a second interrupt signal based on a light emission control signal, wherein the light emission control signal is for controlling a light emission time of a pixel included in the display panel, and wherein the timing controller is further configured to control a level of the second interrupt signal based on whether the image data has started to be received from the host in response to the first interrupt signal and the second interrupt signal.


