Display Panel Driving Circuit Layout for High-PPI Routing
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Solution Overview
Problem
The layout of driving circuits in high-resolution display panels is challenging due to the large number of gate and light emission driving units required, which are typically arranged along the pixel column direction, making efficient arrangement difficult.
Innovation Solution
The driving circuit is redesigned with gate and light emission driving circuits arranged sequentially along the pixel row direction, with gate driving units cascade-connected along the column direction and light emission driving units cascade-connected along the row direction, utilizing separate start and clock lines for each unit, and incorporating dummy circuits to optimize layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the driving circuit includes a large number of gate driving units and light emission driving units cascade-connected along the pixel column direction to support high-resolution display panels, then the display panel can achieve high resolution, but the layout arrangement becomes difficult and complex
Solution Approach 1:
The patent divides the driving circuit into multiple independent driving circuits arranged in parallel along the pixel row direction. Each driving circuit contains gate driving units and light emission driving units that are cascade-connected along the pixel column direction. This segmentation allows the large number of driving units to be organized into manageable modules, simplifying layout arrangement while supporting high-resolution display panels with many rows of pixels
Solution Approach 2:
Instead of arranging all driving units along a single dimension (pixel column direction), the patent introduces a second dimension (pixel row direction) by arranging multiple driving circuits in parallel. This dimensional change distributes the driving units across both row and column directions, reducing layout complexity while maintaining the ability to drive a large number of pixel rows
2Reliability
If multiple gate driving circuits and light emission driving circuits are arranged sequentially along the pixel row direction with separate clock lines for each unit, then signal transmission reliability is improved, but the number of clock lines and circuit complexity increases
Solution Approach 1:
The patent assigns separate clock lines to different groups of driving units based on their spatial distribution. Specifically, odd-numbered driving circuits receive clock signals from one set of clock lines while even-numbered driving circuits receive clock signals from another set. This local differentiation ensures that each driving unit group has dedicated signal paths, improving signal transmission reliability while managing clock line complexity through systematic allocation
Data Source
AI summary
A driving circuit and a display device are provided. The driving circuit includes a gate driving circuit group and a light emission driving circuit group which are arranged sequentially in a pixel row direction. The gate driving circuit group includes a plurality of gate driving circuits arranged sequentially in the pixel row direction. The light emission driving circuit group includes a plurality of light emission driving circuits arranged sequentially in the pixel row direction. Each of the gate driving circuits includes a plurality of gate driving units cascade-connected along a pixel column direction. Each of the light emission driving circuits includes a plurality of light emission driving units cascade-connected along the pixel column direction.