Display Driving Circuit Stabilization via Differential Voltage Control

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Solution Overview

Problem

Display devices using point-to-point interfaces face issues with signal overload due to operation errors like overcurrent, which can damage the display panel by causing unstable output signals and overvoltage.

Innovation Solution

A display device and driving circuit design that incorporates a data driving circuit with a clock recovery circuit, logic circuits, and differential input voltage control to stabilize output signals and prevent damage by generating a lock output signal based on internal clock synchronization and differential input voltage levels, ensuring safe operation even during irregular lock signal changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a point-to-point interface is used to serialize digital image data and transmit data packets, then the number of signal lines is reduced and signal transmission is stabilized, but operation errors such as overcurrent can cause lock signal instability and output signal overload that damages the display panel

Engineering Contradiction:
Improvenumber of signal linesVSAvoidoutput signal stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing clock training and phase locking before normal data transmission. The timing controller and data driving circuit establish synchronization through clock training patterns, ensuring the data driving circuit is ready to receive data packets correctly. This preliminary synchronization prevents operation errors during subsequent data transmission.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the lock signal transmitted from the data driving circuit to the timing controller. This lock signal indicates whether the data driving circuit has successfully synchronized with the clock signal. Based on this feedback, the timing controller can adjust its transmission strategy, stopping data packet transmission when synchronization is lost and resuming when synchronization is restored, thereby preventing output signal overload and panel damage.

Inventive Principle:
Principle #23Feedback

2Productivity

If the timing controller continuously transmits data packets to the data driving circuit, then productivity is improved, but operation errors can cause overcurrent and overload the output signal

Engineering Contradiction:
Improvedata transmission efficiencyVSAvoidovercurrent and overload damage
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The timing controller uses the lock signal feedback from the data driving circuit to control data packet transmission. When the lock signal indicates synchronization is maintained, the timing controller continues transmitting data packets at high speed. When the lock signal changes (indicating loss of synchronization), the timing controller immediately stops transmission. This feedback-based control prevents overcurrent and overload conditions while maintaining high productivity during normal operation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs clock training and phase locking as preliminary actions before normal data transmission begins. This ensures the data driving circuit is properly synchronized and ready to process data packets, preventing operation errors such as overcurrent from occurring during the initial transmission phase.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the lock signal changes due to operation errors, then synchronization is lost, but continuous transmission of data packets can cause overvoltage and damage the display panel

Engineering Contradiction:
Improvesynchronization stabilityVSAvoidovervoltage damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The lock signal serves as feedback indicating the synchronization state between the timing controller and data driving circuit. When this feedback changes (synchronization is lost), the timing controller immediately stops transmitting data packets. This prevents overvoltage conditions that would occur if data packets continued to be transmitted during desynchronization, thereby protecting the display panel from damage.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies preliminary anti-action by stopping data packet transmission as soon as lock signal changes are detected. This counter-action prevents the harmful effect of overvoltage from occurring in the first place, rather than attempting to mitigate it after damage has occurred. The timing controller proactively halts transmission to protect the display panel.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11594186B2Display device and driving circuit having improved stability
Publication Date: 2023.02.28 LG DISPLAY CO LTD
  • US11594186B2 patent drawing
  • US11594186B2 patent drawing
  • US11594186B2 patent drawing

AI summary

A display device and a driving circuit are discussed. According to an embodiment of the present disclosure, it is possible to stably maintain the output signal of the driving circuit when the lock signal indicating the synchronization state of the clock signal is changed due to an operation error such as overcurrent in a display device using a point-to-point interface. In addition, according to an embodiment of the present disclosure, it is possible to prevent damage to the display panel due to an overload generated in the output signal of the driving circuit by an operation error. In addition, according to an embodiment of the present disclosure, it is possible to prevent overload of the driving circuit and damage to the display panel by controlling the operation of the driving circuit through a differential input voltage between the timing controller and the driving circuit.