Display Driving Circuit Power Management via Timing Control
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Solution Overview
Problem
Current display driving circuits with level shift ICs consume power during non-effective pixel display durations, leading to poor energy-saving performance and display quality due to idle driving chips remaining in the on-state.
Innovation Solution
A display driving circuit with a timing controller and driving chip configuration that generates specific signals to turn idle driving chips on during effective pixel display durations and off during non-effective durations, utilizing modules to manage timing and clock signals to optimize power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the level shift IC remains in on-state during non-effective pixel display duration, then the driving signal can be continuously supplied, but power is consumed unnecessarily
Solution Approach 1:
The level shift IC is controlled to operate periodically - turning on during effective pixel display duration and turning off during non-effective pixel display duration. This periodic switching eliminates continuous power consumption while ensuring the driving signal is supplied only when needed for actual pixel display.
2Use of energy by moving object
If the driving chip is turned off during non-effective pixel display duration, then power consumption is reduced, but the driving signal may not be ready when needed
Solution Approach 1:
The level shift IC is turned on slightly before the effective pixel display duration begins and turned off after it ends. This preliminary action ensures the driving signal is fully ready and stable before pixel display starts, while still minimizing the on-time to reduce overall power consumption during non-display periods.
Data Source
AI summary
The present invention provides a display driving circuit and a display device. The display driving circuit comprises a timing controller and a driving chip, and the timing controller comprises a first generation module and a first timing module. The first generation module is connected with the first timing module and the driving chip respectively, and configured to generate a row starting signal for triggering the first timing module to start timing and the driving chip which is idle to turn on. The first timing module is connected with the driving chip, and configured to trigger the driving chip which is idle in a non-effective pixel display duration to turn off, in case a current timing duration equals to an effective pixel display duration. The display driving circuit can prevent an idle driving chip from staying in the on-state and consuming power, so that current requirements for energy saving against a display device can be satisfied, and the quality of display device can be improved.(FIG. 1)