Display Driving Circuit Reference Voltage Segmentation
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Solution Overview
Problem
Display driver circuits for high-definition panels face challenges in achieving stable gray scale display due to increased load on reference voltage bus lines, leading to insufficient display gray levels, noise, and unevenness caused by gate capacitance effects and inconsistent settling times.
Innovation Solution
A driving circuit with a select circuit that selects a predetermined number of gray scale reference voltages based on display data, ensuring at least one voltage is different from others, and an output circuit that outputs voltages corresponding to these selections, reducing the influence of gate capacitance by averaging input voltages across multiple terminals in the source amplifier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all input nodes of source amplifiers are electrically connected to the same reference voltage bus line, then the circuit structure is simplified, but the load on the reference voltage bus line increases causing inconsistent settling times and display instability
Solution Approach 1:
The patent divides the reference voltage bus lines into multiple separate groups (first reference voltage bus line, second reference voltage bus line, etc.), each serving specific input nodes of source amplifiers. This segmentation reduces the load on each individual bus line and ensures that not all input nodes are connected to the same reference voltage source, thereby resolving the settling time inconsistency and display instability issues while maintaining reasonable circuit complexity.
2Device complexity
If the number of reference voltage bus lines is reduced, then the circuit complexity decreases, but the gate capacitance effect increases causing longer settling times and display noise
Solution Approach 1:
The patent segments the reference voltage bus lines into multiple groups where each group serves a specific subset of input nodes. This ensures that the number of amplifiers connected to any single bus line is limited, thereby reducing the total gate capacitance load on each bus line and shortening the settling time, while still maintaining a relatively small overall number of bus lines.
Solution Approach 2:
Different reference voltage bus lines are assigned to different input nodes based on local requirements. By configuring which bus line connects to which input node according to specific conditions, the patent optimizes the local capacitance distribution and settling characteristics for each amplifier input, thereby reducing overall display noise and improving response time.
3Device complexity
If multiple input nodes are connected to the same reference voltage bus line, then the circuit configuration is simplified, but display unevenness and noise occur due to capacitance loading effects
Solution Approach 1:
The patent divides the reference voltage bus lines into multiple segments or groups, with each group serving a specific subset of input nodes rather than all nodes. This segmentation reduces the capacitance loading effect on any single bus line, thereby minimizing display noise and unevenness while still maintaining a relatively simple overall circuit configuration through systematic organization.
Solution Approach 2:
The patent applies different reference voltage bus line assignments to different input nodes based on local characteristics and requirements. By optimizing the local connection configuration between specific input nodes and specific reference voltage bus lines, the patent reduces the harmful capacitance loading effects that cause display noise and unevenness while keeping the overall circuit configuration manageable.
Data Source
AI summary
A DA converter is provided with a select circuit that selects a predetermined number of gray scale reference voltages from a plurality of different gray scale reference voltages on a basis of display data corresponding to a plurality of different gray scale values, and an output circuit that outputs an output voltage corresponding to the gray scale values on a basis of the gray scale reference voltages selected by the select circuit. When the gray scale reference voltages corresponding to the selected gray scale values are substantially equal to the output voltage, the select circuit selects the gray scale reference voltages such that at least one of the gray scale reference voltages to be selected is different from the others.