Display Driving Method Stabilizes Light Emission via Clock Signal Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing driving methods for display devices result in poor display effects due to unstable light emission from the light emitting components, leading to flickering and inadequate brightness control, especially when dealing with mini LED and Micro LED backlight technologies that require precise dimming at pixel-level.
Innovation Solution
A driving method for display devices involving a first control chip to process target display data into conversion and frame synchronization signals, a second control chip to generate a result clock signal that meets preset conditions with the frame synchronization signal, and a third control chip to light the light emitting component based on the result clock and display signals, ensuring stable light emission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the existing driving method is used to control the display device, then the device complexity is reduced, but the display effect deteriorates due to flickering and unstable light emission
Solution Approach 1:
The control function is divided into three separate control chips: first control chip for signal processing, second control chip for clock generation, and third control chip for driving light emitting components. This segmentation allows each chip to specialize in specific functions, improving overall system reliability and stability while managing complexity through functional decomposition.
Solution Approach 2:
The second control chip acts as an intermediary between the first control chip (signal processing) and the third control chip (driving control). It generates the result clock signal by coordinating with both the conversion clock signal and frame synchronization signal, serving as a mediator that ensures proper timing and synchronization without requiring direct complex interaction between the other two chips.
2Adaptability or versatility
If the period of the clock signal is fixed, then the device complexity is reduced, but the adaptability deteriorates when frame synchronization signal period varies
Solution Approach 1:
The clock signal period is made dynamic rather than fixed. The second control chip adjusts the result clock signal period based on the actual frame synchronization signal period, allowing the system to adapt to different frame rates and display modes. This dynamic adjustment mechanism enables the display device to handle various video formats and refresh rates without requiring multiple fixed clock configurations.
Solution Approach 2:
The system changes the temporal parameter (clock signal period) dynamically according to the frame synchronization signal characteristics. By adjusting the period of the result clock signal based on the frame synchronization signal period, the system maintains proper synchronization across different operating conditions, improving adaptability while managing complexity through parameter-based flexibility.
3Manufacturing precision
If the light emitting component is controlled with simple timing signals, then the ease of operation is improved, but the manufacturing precision deteriorates in terms of pixel-level dimming control
Solution Approach 1:
The control function is segmented into specialized chips: the third control chip is dedicated specifically to driving the light emitting components with precise timing. This segmentation allows for sophisticated pixel-level dimming control to be implemented in a specialized module, achieving high manufacturing precision while keeping the overall system architecture manageable and easy to operate through clear functional separation.
Data Source
AI summary
Disclosed is a driving method of a drive device, applied on a drive device. The method includes: receiving, by the first control chip, target display data, and processing, by the first control chip, the target display data to obtain a conversion clock signal, a frame synchronization signal and a pre-processed display signal; obtaining, by the second control chip, a result clock signal based on the conversion clock signal and the frame synchronization signal, a period of the result clock signal and a period of the frame synchronization signal meet a preset condition; obtaining, by the second control chip, a result display signal based on the pre-processed display signal; and lighting, by the third control chip, the light emitting component based on the result clock signal and the result display signal. The present application also discloses a display device and a computer readable storage medium.

