Display Driving Circuit With ESD Voltage Detection
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Solution Overview
Problem
Existing display technologies suffer from abnormal image display due to output errors in the level shifter caused by electro-static discharge, leading to chaotic timing of GOA signals.
Innovation Solution
A display driving circuit with a power management chip, level shifter, and detection circuit that adjusts configuration information based on detected output voltages to correct output errors, using a voltage division and comparison circuit to generate detection signals for the level shifter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the level shifter operates without detection circuit, then the device complexity is reduced, but the reliability of clock signal output deteriorates due to potential ESD-induced errors
Solution Approach 1:
The detection circuit proactively monitors the output voltage of the power management chip before ESD events can cause register data corruption. By detecting voltage abnormalities in advance and triggering timely protection actions, the system prevents clock signal output errors without requiring complex post-error correction mechanisms
Solution Approach 2:
The detection circuit acts as an intermediary between the power management chip and the level shifter. It monitors the output voltage of the power management chip and provides early warning signals to prevent ESD-induced register corruption in the level shifter, thereby protecting the clock signal output without adding complex error correction logic to the level shifter itself
2Adaptability or versatility
If the output mode of the level shifter is fixed, then the device complexity is reduced, but the adaptability to external conditions deteriorates when ESD events occur
Solution Approach 1:
The detection circuit establishes a feedback mechanism that continuously monitors the output voltage of the power management chip. When voltage abnormalities indicating potential ESD events are detected, the system receives feedback signals and automatically adjusts the operation state of the level shifter to prevent register data corruption and maintain clock signal output integrity
Solution Approach 2:
The system performs preliminary detection of voltage abnormalities before ESD events can corrupt the register data. By taking preliminary protective actions based on detected voltage changes, the system adapts to external ESD conditions without requiring complex real-time reconfiguration capabilities
Data Source
AI summary
Embodiments of the present disclosure are directed to a display driving circuit, a display driving device, and a display driving method. The display driving circuit comprises a power management chip, a level shifter, and a detection circuit. The power management chip is electrically connected with the level shifter and the detection circuit. The power management chip is configured to send first configuration information, generate second configuration information according to a detection voltage, and send the second configuration information. The level shifter is configured to output multiple clock signals according to the first configuration information or the second configuration information. The detection circuit is configured to generate the detection voltage according to an output voltage of the power management chip and a preset threshold and send the detection voltage to the power management chip.