Display Driving IC Dynamic Delay Synchronization

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Solution Overview

Problem

Existing display driving integrated circuits (ICs) face challenges in aligning synchronization signals, leading to inefficient power consumption due to processing redundant synchronization information and inconsistent phase relationships, which affect the proper sampling of display frames.

Innovation Solution

The display driving IC generates internal synchronization signals by dynamically updating a delay value based on the phase relationship between external synchronization signals and information, allowing it to match the phase of the internal signals with the processor-provided synchronization information, thereby reducing power consumption by pausing data transmission during redundant synchronization periods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the display driving IC processes external horizontal synchronization signals and synchronization information from the data stream simultaneously, then synchronization accuracy is improved, but power consumption increases due to redundant processing

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts and utilizes the external horizontal synchronization signal separately from the data stream, rather than processing all synchronization information through the data stream. This allows the display driving IC to obtain horizontal synchronization information from an external source, eliminating redundant processing of synchronization data within the main data stream and reducing power consumption while maintaining synchronization accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary alignment by dynamically adjusting the phase of the external horizontal synchronization signal before it is used for driving the display panel. By pre-aligning the synchronization signals and pausing data transmission during redundant synchronization periods, the system avoids unnecessary processing operations, thereby reducing power consumption while ensuring accurate synchronization.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the display driving IC uses fixed delay timing for synchronization signals, then circuit complexity is reduced, but synchronization precision deteriorates due to phase misalignment

Engineering Contradiction:
Improvecircuit complexityVSAvoidsynchronization precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent implements dynamic delay adjustment by introducing a delay value that can be updated based on the phase relationship between external and internal synchronization signals. Instead of using a fixed delay timing, the system dynamically adapts the delay to maintain optimal phase alignment, thereby improving synchronization precision without requiring overly complex circuitry for rigid precision mechanisms.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback mechanism where the delay value is continuously updated based on the detected phase relationship between the external horizontal synchronization signal and the synchronization information in the data stream. This feedback loop allows the system to automatically adjust and maintain precise synchronization without requiring complex predetermined timing circuits.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250218336A1Display device, display driving integrated circuit, and operating method of display driving integrated circuit
Publication Date: 2025.07.03 NOVATEK MICROELECTRONICS CORP
  • US20250218336A1 patent drawing
  • US20250218336A1 patent drawing
  • US20250218336A1 patent drawing

AI summary

A display device, a display driving integrated circuit (IC), and an operating method of a display driving IC are provided. The display driving IC receives a data stream and an external horizontal synchronization signal from a processor, where the data stream includes display frame data, vertical synchronization information, and horizontal synchronization information. The display driving IC generates an internal vertical synchronization signal based on the vertical synchronization information and the horizontal synchronization information. The display driving IC dynamically updates a delay value based on a phase relationship among the vertical synchronization information, the horizontal synchronization information, and the external horizontal synchronization signal. The display driving IC delays the external horizontal synchronization signal based on the delay value to generate an internal horizontal synchronization signal. The display driving IC drives a display panel based on the display frame data, the internal vertical synchronization signal, and the internal horizontal synchronization signal.