Display Driving IC Power Down Mode During Initialization
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Solution Overview
Problem
Display driving systems face high power consumption during initializing, data transmission, and vertical blank periods due to continuous operation of timing controllers and source drivers, which is inefficient and increases energy costs.
Innovation Solution
Implementing a power down mode in display driving integrated circuits (ICs) during these periods by reducing bias currents and modifying on-die termination resistance, and using a standby control signal to switch between normal and power down modes, thereby minimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If timing controller and source drivers operate continuously during initializing period, data transmission period, and vertical blank period, then image reproduction function is maintained, but power consumption increases significantly
Solution Approach 1:
The patent implements periodic operation by switching the timing controller and source drivers between normal mode and power down mode based on operational periods. During initializing period, data transmission period, and vertical blank period, the system enters power down mode to reduce power consumption, while maintaining the ability to switch back to normal mode when image reproduction is required. This periodic switching resolves the contradiction between continuous operation reliability and energy efficiency.
Solution Approach 2:
The patent introduces dynamic operation modes that allow the timing controller and source drivers to adapt their operational state based on system requirements. The standby control signal dynamically switches between normal mode (full functionality) and power down mode (reduced power consumption), enabling the system to optimize the balance between reliability and power consumption rather than operating in a static continuous state.
2Use of energy by moving object
If power down mode is activated during data transmission period, then power consumption is reduced, but data transmission functionality may be affected
Solution Approach 1:
The patent applies periodic action by strategically activating power down mode during specific portions of the data transmission period when data transmission is not required. The system monitors the data transmission schedule and switches to power down mode during appropriate intervals, ensuring that productivity is maintained during active transmission while power consumption is reduced during idle intervals within the same period.
3Use of energy by moving object
If bias current is reduced in clock signal generator during power down mode, then power consumption decreases, but clock signal generation capability is compromised
Solution Approach 1:
The patent implements dynamic bias current control in the clock signal generator based on operational mode. During normal mode, full bias current is supplied to maintain reliable clock signal generation. During power down mode, bias current is reduced to minimize power consumption. The system dynamically adjusts the bias current level according to the standby control signal, resolving the contradiction between power consumption and clock signal generation reliability.
Data Source
AI summary
According to an example embodiment, a display driving integrated circuit (IC) includes a timing controller and a plurality of source drivers. The timing controller is configured to output a plurality of signals to the plurality of source drivers, and at least one of the timing controller and the plurality of source drivers operates in a power down mode in at least one of an initializing period, a data transmission period, and a vertical blank period. According to an example embodiment, a mode conversion method used in a display driving IC includes switching between a normal mode to a power down mode in response to a standby control signal. The power down mode is implemented on at least one of a timing controller and a plurality of source drivers included in the display driving IC in at least one of an initializing period, a data transmission period, and a vertical blank period.