Display Driving Circuit for Selective Multi-Frequency Gate Control
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Solution Overview
Problem
Existing display technologies face challenges in efficiently managing different driving frequencies across various areas of a display apparatus, leading to inefficiencies and potential image quality issues.
Innovation Solution
A driving circuit design that includes stages with pull-up, pull-down, and control transistors, along with capacitors and reset transistors, allows for selective output of gate signals based on enable signals, enabling dynamic frequency adjustment in different display areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single driving frequency is used for the entire display area, then the circuit design is simple and power consumption is low, but the display cannot adapt to different area requirements for different frequencies
Solution Approach 1:
The gate driving circuit is divided into multiple independent stages, each capable of operating at different frequencies. Each stage includes separate pull-up and pull-down transistors that can be independently controlled, allowing different segments of the display to operate at different frequencies simultaneously.
Solution Approach 2:
Different stages of the gate driving circuit are configured with different driving frequencies according to the specific requirements of corresponding display areas. The control transistor gates are selectively connected to different clock signals based on the frequency requirements of each display region.
2Reliability
If multiple driving frequencies are supported for different areas, then the display can optimize image quality for each area, but the circuit complexity increases
Solution Approach 1:
The gate driving circuit employs dynamic frequency selection where control transistor gates are selectively connected to different clock signals with different frequencies. This dynamic switching allows the circuit to adapt frequency based on real-time display requirements without requiring completely separate circuit paths.
Solution Approach 2:
Each stage of the gate driving circuit is designed to be multi-functional, capable of operating at multiple frequencies by selectively connecting control transistor gates to different clock signals. This universal design allows a single stage to serve multiple frequency requirements.
3Use of energy by moving object
If frequency is changed in a portion of the display area, then power consumption can be optimized for that area, but gate signal output must be blocked for that area
Solution Approach 1:
The gate driving circuit uses periodic clock signals with different frequencies for different stages. By selectively enabling or disabling clock signals for specific stages, the circuit can control power consumption for different display areas while maintaining proper gate signal output timing through periodic operation.
Data Source
AI summary
A driving circuit includes a plurality of stages, each of the plurality of stages including: a pull-up transistor to transmit a first voltage to an output terminal; a pull-down transistor to transmit a second voltage lower than the first voltage to the output terminal; and a control transistor connected between a first terminal to receive an enable signal and a second terminal to output a selection signal, the control transistor including a gate connected to a gate of the pull-down transistor. When a voltage of the gate of the pull-down transistor is a gate-on voltage, the control transistor is to output the selection signal based on the enable signal, and the pull-down transistor is to transmit an output signal to the output terminal based on the second voltage.