Display Panel Driving Timing to Prevent Peak Current Overlap

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Solution Overview

Problem

In high-gray-level displays, the use of two driving integrated circuits with the same phase output leads to excess peak current, increasing power supply requirements and usage costs.

Innovation Solution

A display device with a driving control module that controls data signals for different display regions such that their high electric potential periods are alternately arranged, preventing peak current overlap, and includes a control chip and separate driving chips for each data line to manage the electric potential values effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If two driving ICs drive the display panel with the same phase output, then the display panel can be driven to display in two display regions, but currents driving the two display regions are superimposed at peak value, resulting in an excess peak current

Engineering Contradiction:
Improvedisplay capabilityVSAvoidpeak current
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The patent applies periodic action by dividing the display period into multiple sub-periods and alternately activating different display regions in each sub-period. The first driving IC drives the first display region during the first sub-period, then the second driving IC drives the second display region during the second sub-period, creating a time-division multiplexing effect that prevents current superposition while maintaining full display functionality

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements dynamics by dynamically switching the operating states of the two driving ICs and their corresponding display regions. The control module dynamically adjusts which driving IC is active in each sub-period, creating a dynamic time-division driving scheme that adapts the system operation to prevent peak current overlap while ensuring continuous display refresh

Inventive Principle:
Principle #15Dynamics

2Productivity

If two driving ICs drive the display panel with the same phase output, then the display panel can be driven to display in two display regions, but the excess peak current increases output requirements of a power supply and increases usage costs

Engineering Contradiction:
Improvedisplay capabilityVSAvoidpower supply requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies periodic action by dividing the display period into multiple sub-periods and alternately activating different display regions in each sub-period. The first driving IC drives the first display region during the first sub-period, then the second driving IC drives the second display region during the second sub-period, creating a time-division multiplexing effect that prevents current superposition while maintaining full display functionality

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements dynamics by dynamically switching the operating states of the two driving ICs and their corresponding display regions. The control module dynamically adjusts which driving IC is active in each sub-period, creating a dynamic time-division driving scheme that adapts the system operation to prevent peak current overlap while ensuring continuous display refresh

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11847985B2Display device and driving method thereof
Publication Date: 2023.12.19 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US11847985B2 patent drawing
  • US11847985B2 patent drawing

AI summary

The present application proposes a display device and a driving method thereof. The display device includes a display panel and a driving control module. The display panel includes first data lines and second data lines. The driving control module controls each of the first data lines and each of the second data lines to output a first data signal and a second data signal. A high electric potential period of the first data signal is within a low electric potential period of the second data signal. A high electric potential period of the second data signal is within a low electric potential period of the first data signal.