Display Driving Structure Reducing Load Current via Polarity Control
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Solution Overview
Problem
The existing display driving technologies face challenges with high operating currents in driving chips due to parasitic capacitors on data lines, leading to safety concerns and reduced service life, especially when switching between high and low grayscale voltages.
Innovation Solution
A display driving structure and method that includes a switching component with control terminals to manage the conduction of data signals across scan lines, reducing polarity reversals and load current by adjusting the write time of data signals based on polarity differences or similarities, thereby minimizing the frequency of voltage switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If data lines switch between high and low grayscale voltages to control display brightness, then display brightness control is achieved, but the parasitic capacitor on the data line causes large voltage span leading to increased operating current of the driving chip
Solution Approach 1:
The invention introduces a storage capacitor connected to the data line that pre-stores the grayscale voltage before it needs to be applied to the pixel unit. This preliminary storage action allows the driving chip to output voltage changes more smoothly without frequent switching between high and low levels, thereby reducing the charging/discharging cycles of the parasitic capacitor and lowering the operating current.
Solution Approach 2:
The storage capacitor acts as an intermediary element between the driving chip and the data line. It buffers the voltage transitions by storing charge temporarily, which smooths out the voltage span changes on the data line and reduces the current demand on the driving chip while maintaining the required grayscale voltage levels for display brightness control.
2Productivity
If grayscale voltages are switched frequently to update pixel values, then display refresh is achieved, but the large voltage span causes increased current and safety concerns
Solution Approach 1:
The storage capacitor is charged in advance to the required grayscale voltage level before the data line needs to switch. This preliminary charging action prepares the voltage in advance, allowing the driving chip to make smoother transitions and avoid frequent large-span voltage switching, thereby maintaining refresh rates while improving reliability and safety.
Solution Approach 2:
The invention changes the temporal distribution of voltage parameters by using the storage capacitor to hold voltage levels between updates. This parameter transformation allows the driving chip to operate with smaller voltage swings over time, reducing current stress and improving safety while maintaining the necessary refresh performance.
3Device complexity
If the driving chip provides direct voltage control to data lines, then simple control structure is maintained, but high current consumption reduces service life
Solution Approach 1:
The storage capacitor is introduced as an intermediary component between the driving chip and the data line. This addition, while slightly increasing structural complexity, significantly reduces the current consumption and thermal stress on the driving chip, thereby extending its service life. The capacitor handles the bulk of the charge storage and release, protecting the driving chip from excessive current demands.
Data Source
AI summary
A display driving structure includes a drive component and at least a switching component. The drive component is connected to data lines in pixel groups to provide a one-to-one corresponding data signal to each of the sub-pixels through the data lines. A first input terminal of the switching component is configured to receive a p-th row of scanning signals, a second input terminal is configured to receive a (p+1)-th row of scanning signals, a first output terminal is connected to a p-th row of the scan lines in the pixel group, a second output terminal is connected to a (p+1)-th row of the scan lines in the pixel group, and a control terminal is configured to control the conduction sequence of signals in the switching component according to the polarities of the data signals received by adjacent two sub-pixels connected to each column of the data lines.