Display Driving Circuit Waveform Distortion Control
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Solution Overview
Problem
Existing display device driving circuits suffer from waveform distortion in scanning signal lines, leading to variations in grayscale voltage and deteriorated display quality, particularly due to delayed signal falling and threshold voltage shifts.
Innovation Solution
A display device with a driving circuit that includes a main driving circuit and an auxiliary driving circuit, where the auxiliary circuit uses an auxiliary transistor with one source or drain connected to the output signal line and the other to a clock signal line, and the gate connected to the main transistor, to improve waveform distortion by controlling the signal line's potential and preventing threshold voltage shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transistor NT15 for maintaining scanning signal line potential is added to the driving circuit, then the circuit can maintain low level potential, but the signal falling is delayed and waveform distortion remains
Solution Approach 1:
The patent divides the driving circuit into multiple stages: a first driving circuit that outputs high level signals and a second driving circuit that outputs low level signals. The scanning signal line is connected to both circuits, allowing the first circuit to raise the signal and the second circuit to quickly pull it down, thereby maintaining waveform quality without delay.
Solution Approach 2:
The patent introduces a capacitor connected between the scanning signal line and a reference potential. This capacitor acts as an intermediary energy storage element that helps maintain the low level potential by providing a discharge path, enabling the signal to fall quickly while still maintaining the low level state during the holding period.
2Reliability
If a clock signal is applied to the gate of transistor RT3 (LT3) for long duration, then the transistor can maintain scanning signal line potential, but threshold value voltage shifts considerably and waveform distortion increases
Solution Approach 1:
The patent uses periodic clock signals to control the transistors in the driving circuit. The clock signal is applied in periodic pulses rather than continuously, allowing the transistor to operate only during specific time intervals. This periodic operation maintains the scanning signal line potential while preventing excessive threshold voltage shift that would occur with continuous operation.
Solution Approach 2:
The patent performs preliminary actions by pre-charging the capacitor and pre-positioning the transistor gates before the main signal transition. This allows the circuit to be ready for rapid response without requiring prolonged clock signal application, thereby maintaining potential stability while avoiding threshold voltage drift.
3Reliability
If the scanning signal line is connected to both first and second driving circuits, then waveform distortion is improved, but device complexity increases
Solution Approach 1:
The patent merges the first and second driving circuits into a unified structure where both circuits share common components such as the capacitor and transistor gates. The scanning signal line is connected to both circuits, but they operate cooperatively rather than independently, reducing the overall complexity while maintaining waveform quality through coordinated action.
Data Source
AI summary
A display device includes a driving circuit that applies an active potential which is a potential for turning on pixel transistors sequentially to a plurality of output signal lines, wherein the driving circuit includes a main driving circuit that outputs the active potential to one end of the output signal line of the plurality of output signal lines by applying a clock signal caused by a input of the active potential output from the upper output signal line, and an auxiliary driving circuit that has an auxiliary transistor which is a transistor where the other end of the output signal line is connected to a signal line for the clock signal via the source or the drain. Thereby, output waveform distortion in the scanning signal line can be improved and thus display quality can be enhanced.