Display DVFS Control for Frame-Aware Power Scaling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing electronic devices experience unnecessary power consumption due to maintaining high voltage and clock speed during frames with no frame data updates, especially in over-the-top video services, leading to increased overall power consumption.
Innovation Solution
Implementing a dynamic voltage and frequency scaling (DVFS) control method that dynamically adjusts power and clock signals based on frame data transmission periods, using a display processor to generate DVFS setup/release signals and a power management unit to manage bandwidth, reducing power consumption by quickly releasing resources when no data is transmitted.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the shared resources maintain higher voltage and clock speed during frames with no frame data updates, then the display can respond quickly when frame data needs to be transmitted, but unnecessary power consumption occurs
Solution Approach 1:
The patent implements dynamic voltage and frequency scaling (DVFS) that adjusts the operating voltage and clock frequency of shared resources based on real-time frame data transmission requirements. When frame data needs to be transmitted, the resources operate at higher voltage and clock speed; when no transmission is needed, they scale down to lower states, thus achieving both quick response capability and power savings
Solution Approach 2:
The system changes the operational parameters (voltage and frequency) of the shared resources dynamically based on the frame data transmission status. The display processor generates DVFS control signals that adjust these parameters in real-time, allowing the system to transition between high-performance and low-power states according to actual needs
2Use of energy by moving object
If the DVFS control is updated in real-time based on frame data transmission status, then power consumption is reduced, but the system complexity increases
Solution Approach 1:
The display processor automatically generates DVFS control signals based on its own frame data transmission requirements without requiring external intervention. The system monitors its own operational state and autonomously adjusts the shared resources' power parameters, simplifying the overall control architecture while achieving real-time power optimization
Data Source
AI summary
An electronic device may include a host CPU providing a frame data and a frame update instruction; a display driving IC (DDI) configured to drive the display panel; a display processor configured to determine a frame transmission period for transmitting the frame data to the DDI in response to the frame update instruction, and to generate a DVFS (Dynamic Voltage and Frequency Scaling) setup/release signal according to the determined frame transmission period; and a power management unit configured to manage a power and clock signals to provide a band width required for the frame data transmission according to the DVFS setup/release signal.