Display Electrode Layout to Prevent Contact Hole Overlap

The patent resolves the contradiction by transitioning from a two-dimensional planar arrangement to a three-dimensional stacked architecture. Multiple conductive layers (first conductive layer, second conductive layer, third conductive layer) are arranged in the thickness direction with corresponding contact holes positioned at different vertical levels. This dimensional arrangement allows electrical connections to be established without requiring contact holes to overlap with conductive layers in the same plane, thereby preventing insulating layer defects while achieving complex device integration.

The patent applies segmentation by dividing the device into distinct functional layers and regions. The circuit element layer is segmented into multiple conductive layers (first, second, and third conductive layers) with各自 specific functions, and the light emitting element layer is separated from the circuit elements by intermediate insulating layers. This segmentation allows independent optimization of alignment in each layer during manufacturing, preventing alignment defects from propagating across the entire device while maintaining high manufacturing precision.

The patent implements preliminary action by pre-positioning contact holes in the first insulating layer at locations that correspond to contact holes in the second insulating layer, before forming the conductive layers. This preliminary arrangement ensures that when conductive layers are subsequently formed, they connect through pre-aligned contact holes without requiring the insulating layer to be formed in areas where contact holes would overlap with conductive structures, thereby preventing insulating layer failure while maintaining ease of manufacture.