Display Electrode Layout for Flat Via Layers and Stable Alignment
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Solution Overview
Problem
Display devices face challenges in maintaining a consistent critical dimension of insulating layers due to step differences caused by lower conductive layers, leading to potential contact defects between light emitting elements and connection electrodes.
Innovation Solution
The display device incorporates a structure with multiple conductive layers and bank patterns that partition light emission areas, ensuring that areas where conductive layers overlap occupy about 80% or more of the alignment area, thereby maintaining a flat via layer and preventing distortion of the insulating layer critical dimension.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple conductive layers are disposed in different layers to form display device structures, then device functionality is improved, but step differences occur between lower conductive layers causing critical dimension variation of insulating layers
Solution Approach 1:
The patent applies dimensionality change by extending bank patterns in a first direction to create overlapping areas with conductive layers in different layers. This spatial arrangement in multiple dimensions ensures that the overlapping area between conductive layers and bank patterns is 80% or more of the alignment area, effectively compensating for step differences and maintaining insulating layer critical dimension consistency.
Solution Approach 2:
The patent implements local quality by creating specific overlapping regions where bank patterns and conductive layers intersect with high precision (80% or more overlap). This localized high-precision arrangement addresses the step difference problem specifically at critical interfaces without requiring uniform precision across the entire device structure.
2Reliability
If conductive layers are arranged to improve device performance, then device performance is enhanced, but contact defects occur between light emitting elements and connection electrodes
Solution Approach 1:
The patent uses dimensionality change by arranging bank patterns and conductive layers in overlapping configurations across multiple layers. The overlapping area of 80% or more of the alignment area creates a robust spatial relationship that ensures proper contact alignment between light emitting elements and connection electrodes, preventing contact defects while maintaining enhanced device performance.
3Manufacturing precision
If via layer flatness is maintained to prevent insulating layer distortion, then manufacturing precision is improved, but device complexity increases due to multiple conductive layers
Solution Approach 1:
The patent applies local quality by focusing precision requirements on specific overlapping regions between bank patterns and conductive layers (80% or more overlap area). This localized approach maintains via layer flatness and prevents insulating layer distortion only where critical, rather than requiring uniform precision across the entire complex multi-layer structure.
Data Source
AI summary
A display device comprises conductive layers disposed on a substrate in different layers, a via layer on the conductive layers, a bank disposed on the via layer and defining a light emission area, bank patterns on the via layer and extended in a first direction, a first electrode on the bank patterns and extended in the first direction, and a second electrode disposed on the bank patterns and extended in the first direction, and light emitting elements on the first electrode and the second electrode. The bank patterns are spaced apart from each other. The first and second electrodes are spaced apart from each other. The bank and the bank patterns define an alignment area in which the light emitting elements are disposed. An area, in which two or more of the conductive layers overlap each other in a plan view is about 80% or more in the alignment area.