Display Substrate ESD Circuit Layout for Narrow Bezel Panels

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Solution Overview

Problem

The arrangement of signal lines and circuits within display panels hinders the realization of a narrow bezel design, as existing configurations occupy excessive space, preventing the achievement of a slim border in display devices.

Innovation Solution

A display substrate design that optimizes the positioning of electrostatic discharge circuits, particularly the second electrostatic discharge circuits, by interspersing them within the first electrostatic discharge circuits and arranging multiplexing and test circuits in a manner that reduces their spatial footprint, thereby facilitating a narrow bezel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electrostatic discharge circuits are arranged in a conventional manner, then they provide adequate electrostatic discharge protection, but they occupy excessive space in the bezel region

Engineering Contradiction:
Improveelectrostatic discharge protectionVSAvoidspace occupied by electrostatic discharge circuits
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines first electrostatic discharge circuits and second electrostatic discharge circuits into a shared bezel region arrangement. The second electrostatic discharge circuits are positioned between the first electrostatic discharge circuits and the display region, creating an integrated protective structure that reduces total occupied space while maintaining discharge protection functionality for both data lines and signal lines.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes the bezel region space more efficiently by arranging electrostatic discharge circuits in a compact configuration that leverages the available dimensional space. By positioning circuits along the bezel edge and utilizing vertical stacking in the cross-section, the design maximizes space utilization without compromising protective function.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If multiplexing circuits and test circuits are arranged in traditional configurations, then they provide necessary circuit functionality, but they increase the bezel width

Engineering Contradiction:
Improvecircuit functionalityVSAvoidbezel width
Core Design Contradiction:
Adaptability or versatilityVSLength of stationary object

Solution Approach 1:

The patent segments the bezel region into distinct functional zones: a first bezel region containing multiplexing circuits and first electrostatic discharge circuits, and a second bezel region containing test circuits and second electrostatic discharge circuits. This segmentation allows each circuit type to be optimally positioned in its dedicated zone, reducing overall bezel width while maintaining all necessary functionalities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different arrangement strategies to different circuit types based on their specific requirements. Multiplexing circuits are arranged in the first bezel region with specific spacing and connection patterns, while test circuits are positioned in the second bezel region with optimized layouts. This localized optimization reduces the overall bezel footprint while preserving each circuit's functional quality.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12488760B2Display substrate reducing arrangement space occupied by second electrostatic discharge circuit
Publication Date: 2025.12.02 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12488760B2 patent drawing
  • US12488760B2 patent drawing
  • US12488760B2 patent drawing

AI summary

The present disclosure provides a display substrate including a base substrate, a plurality of data lines, a plurality of multiplexing circuits, a plurality of multiplexing data lines, a plurality of first electrostatic discharge circuits, a plurality of second electrostatic discharge circuits, and a plurality of first signal lines located on the base substrate. The plurality of multiplexing circuits are sequentially arranged along edges of the display region. The plurality of multiplexing circuits are electrically connected with the plurality of multiplexing data lines and the plurality of data lines. The plurality of first electrostatic discharge circuits are electrically connected to the plurality of multiplexing data lines, and the plurality of second electrostatic discharge circuits are electrically connected to the plurality of first signal lines.