Display Substrate Layout With ESD Protection and Stable Voltage Routing

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Solution Overview

Problem

Existing display devices face challenges in improving reliability and efficiency, particularly in the integration and protection of light-emitting elements within the display area and non-display area.

Innovation Solution

The display device incorporates a light-emitting element with a specific semiconductor layer structure, including an insulating film to prevent electrical shorts and enhance light emission efficiency, and a substrate design with dedicated non-display areas for signal and power lines, ensuring stable electrical connections and reduced voltage drops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If light-emitting elements are integrated in the display area, then display functionality is improved, but electrical shorts and reliability issues worsen

Engineering Contradiction:
Improvedisplay functionalityVSAvoidelectrical short prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

An insulating film is introduced as an intermediary layer between adjacent light-emitting elements and between the light-emitting elements and signal lines. This mediator prevents electrical shorts while allowing the display area to be fully utilized for light emission, thus resolving the contradiction between display functionality and electrical reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If signal lines and power lines are routed through the display area, then device complexity is reduced, but voltage drops and electrical instability worsen

Engineering Contradiction:
Improverouting structureVSAvoidvoltage stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The substrate is divided into two functional zones: a display area dedicated to light-emitting elements and a non-display area dedicated to signal lines and power lines. This segmentation allows signal lines to be routed in the non-display area, reducing voltage drops and electrical instability while maintaining manageable device complexity through organized spatial separation.

Inventive Principle:
Principle #1Segmentation

3Illumination intensity

If the display area is maximized, then luminance uniformity is improved, but space for electrical connections and protection worsens

Engineering Contradiction:
Improveluminance uniformityVSAvoidelectrical connection stability
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

Electrical connections are moved from the two-dimensional display plane to the non-display area, utilizing the third dimension of substrate space. This allows the display area to be maximized for uniform luminance while electrical connections are established in the non-display area, maintaining connection stability without compromising display area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If insulating films are added between light-emitting elements, then electrical short prevention is improved, but manufacturing complexity worsens

Engineering Contradiction:
Improveelectrical short preventionVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The insulating film formation process is merged with the existing thin-film fabrication process used for other display components. By integrating the insulating film deposition into the standard thin-film manufacturing sequence, the additional reliability feature is achieved without significantly increasing manufacturing complexity or requiring separate production lines.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4040487B1Display device
Publication Date: 2026.01.21 SAMSUNG DISPLAY CO LTD
  • EP4040487B1 patent drawingFigure 1~2
  • EP4040487B1 patent drawingFigure 3
  • EP4040487B1 patent drawingFigure 4

AI summary

A display device (DD) includes a substrate (SUB) including a display area (DA) and a non-display area (NDA) adjacent to the display area, a plurality of pixels (PXL) being located in the display area, a driver (DIC) located in the non-display area, a data line (DL) electrically connected to the driver to transmit a data signal to each of the plurality of pixels, a first driving voltage line (DVL1) and a second driving voltage line (DVL2) in the non-display area, and an antistatic portion (ESDP) in the non-display area and connected between the data line and the first driving voltage line. The display area further includes at least one first area (A1) electrically connected to one side (DICa) of the driver and at least one second area (A2) electrically connected to another side (DICb) of the driver. In addition, the non-display area includes a first non-display area (NDA1) corresponding to the first area and a second non-display area (NDA2) corresponding to the second area.