Display Fan-Out Line Layout for High-Resolution Interference Control
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Solution Overview
Problem
As display devices increase in resolution, the increased number of wirings leads to signal interference and reduced image quality due to unintended coupling between neighboring wires, which can also cause brightness deviations.
Innovation Solution
The implementation of fan-out lines in different layers, with alternately arranged first and second fan-out lines on different layers, and symmetric outermost lines on the same layer to minimize interference and brightness deviations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of wirings is increased to achieve higher resolution, then the resolution is improved, but signal interference between neighboring wirings occurs
Solution Approach 1:
The patent applies multi-layer wiring structure where fan-out lines are distributed across different layers (first layer, second layer, third layer). This vertical dimensionality change allows increased wiring capacity without increasing planar density, thereby reducing signal interference between neighboring wirings while maintaining high resolution capability.
2Measurement precision
If the spacing between neighboring wirings is reduced to accommodate more wirings, then the resolution is improved, but unintended coupling (interference) increases
Solution Approach 1:
By distributing fan-out lines across multiple layers with alternating patterns, the patent increases the effective spacing between adjacent signal lines in the planar view. Lines that would be closely spaced on a single layer are separated vertically into different layers, reducing capacitive coupling and unintended interference while enabling higher resolution displays.
3Device complexity
If fan-out lines are arranged in a single layer, then the structure is simple, but signal interference occurs between adjacent lines
Solution Approach 1:
The patent segments the fan-out lines into multiple groups distributed across different layers. First fan-out lines, second fan-out lines, and third fan-out lines are placed on different layers, creating a segmented wiring architecture that reduces interference between adjacent lines while maintaining structural organization and manageability.
4Object-affected harmful factors
If outermost fan-out lines of adjacent fan-out units are on different layers, then interference is reduced, but brightness deviation occurs in the display device
Solution Approach 1:
The patent employs an asymmetric alternating pattern where outermost fan-out lines of adjacent fan-out units are strategically positioned on different layers to reduce interference, while inner lines follow a symmetric alternating pattern. This asymmetric arrangement at the boundaries compensates for potential brightness deviations by ensuring that adjacent fan-out units have comparable electrical characteristics despite the layer differences.
Data Source
AI summary
A display device includes: a substrate including a display area and a peripheral area at least partially surrounding the display area; a plurality of scan lines extending in a first direction in the display area; a plurality of data lines extending in a second direction intersecting the first direction in the display area; and a plurality of fan-out regions located in the peripheral area, each of the plurality of fan-out regions including fan-out lines electrically connected to the plurality of data lines, wherein in at least some of the plurality of fan-out regions, the fan-out lines include first fan-out lines and second fan-out lines alternately arranged and located on different layers, and where the outermost fan-out lines of first and second fan-out regions that are adjacent to each other are either first fan-out lines or second fan out lines.