Display Substrate Fan-Out Layout for Narrow-Bezel Panels

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Solution Overview

Problem

Existing display technologies face challenges in narrowing the bezel width of display substrates due to the space occupied by fan-out regions, which complicates the design and limits the achievement of super-narrow or bezel-less displays.

Innovation Solution

The display substrate design includes a drive circuit layer with power supply lines, data signal lines, and data fan-out lines arranged at intervals along different directions, with non-overlapping projections and connections via vias, allowing for a more compact layout that reduces the bezel width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If fan-out regions are used to connect signal lines, then signal transmission is achieved, but bezel width increases

Engineering Contradiction:
Improvebezel widthVSAvoidfan-out structure complexity
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The patent transitions from planar signal line connections to three-dimensional stacked connections using vias. Signal lines are arranged in multiple layers (first signal line layer, second signal line layer) connected through vertical vias, enabling signal transmission without requiring lateral fan-out regions, thus reducing bezel width while maintaining connectivity functionality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the signal transmission path into multiple independent layers. Each layer contains specific signal lines (power supply lines, data signal lines, initial signal lines) that are segmented and routed independently, then connected through vias to form complete transmission paths, eliminating the need for complex planar fan-out structures

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If signal lines are arranged closely to reduce bezel width, then space efficiency improves, but signal interference increases

Engineering Contradiction:
Improvedisplay substrate area utilizationVSAvoidsignal interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent uses vertical stacking to separate signal lines into different layers. Power supply lines, data signal lines, and initial signal lines are placed in different signal line layers, with insulation layers between them. This three-dimensional arrangement allows close packing in the planar view while maintaining electrical isolation through vertical separation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces insulation layers as intermediary structures between adjacent signal lines in different layers. These insulation layers provide electrical isolation, preventing signal interference while allowing the signal lines to be arranged closely in the planar dimension, thus improving space utilization without compromising signal integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12469456B2Display substrate with optimized fan-out structure, preparation method thereof, and display apparatus
Publication Date: 2025.11.11 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12469456B2 patent drawing
  • US12469456B2 patent drawing
  • US12469456B2 patent drawing

AI summary

A display substrate and a manufacturing method therefor, and a display device are provided. The display substrate includes a drive circuit layer disposed on a substrate, the drive circuit layer includes a plurality of circuit units, at least one circuit unit includes a pixel drive circuit, a first power supply line providing a power supply signal to the pixel drive circuit, a data signal line providing a data signal to the pixel drive circuit, and a data fan-out line connected with the data signal line; at least a portion of the first power supply line, the data signal line, and the data fan-out line extends along a second direction and is arranged at intervals along a first direction, at least a portion of the data fan-out line is disposed between the first power supply line and the data signal line, the first direction intersects with the second direction.