Display Fault Pattern Before Shutdown via PMIC
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Solution Overview
Problem
Current display apparatuses lack efficient mechanisms for analyzing and detecting defects or faults, which can lead to prolonged fault analysis schedules and increased costs in identifying and rectifying issues.
Innovation Solution
A display apparatus comprising a display panel, a timing controller, and a power management integrated circuit (PMIC) that stores fault patterns to represent defective phenomena, allowing for the display of a corresponding fault pattern before shutting down, facilitating easy identification of defects without additional processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fault detection mechanisms are added to the display apparatus, then defect detection efficiency is improved, but device complexity increases
Solution Approach 1:
The patent combines fault detection functionality into the existing PMIC component, which already manages power supply to the display panel. The PMIC integrates sensor circuits and storage units to detect defective phenomena (over-current, over-temperature, etc.) and stores fault data without requiring separate dedicated fault detection hardware, thus improving defect detection efficiency while minimizing increases in device complexity
Solution Approach 2:
The PMIC is designed to perform multiple functions: power supply management, fault detection through integrated sensors, fault data storage, and coordination with the timing controller for fault pattern display. This multi-functional approach allows a single component to handle various defective phenomena detection and response, improving overall system efficiency without proportionally increasing complexity
2Ease of operation
If fault patterns are displayed on the panel before shutdown, then fault identification ease is improved, but energy consumption increases
Solution Approach 1:
The system displays the fault pattern on the display panel immediately when a defective phenomenon is detected, before shutting down the panel. This preliminary action allows users to identify the fault type (over-current, over-temperature, etc.) while the panel is still operational, making fault identification easier without requiring additional post-shutdown analysis processes
Solution Approach 2:
The timing controller periodically checks fault data from the PMIC's storage unit and displays corresponding fault patterns. The system uses periodic polling rather than continuous monitoring, checking for faults at appropriate intervals and only activating the display when necessary, thereby reducing overall energy consumption compared to continuous operation
Data Source
AI summary
A display apparatus includes a display panel, a timing controller and a power management integrated circuit (PMIC). The timing controller is to control an operation of the display panel and to store a plurality of fault patterns to be displayed on the display panel to represent that a plurality of defective phenomena have occurred. The PMIC is to supply a first power supply voltage to the timing controller and to monitor whether the plurality of defective phenomena have occurred. When a first defective phenomenon among the plurality of defective phenomena is sensed, the PMIC is to store first fault data and to shut down the display panel. When the first defective phenomenon is sensed, the timing controller is to control the display panel to display a first fault pattern corresponding to the first defective phenomenon among the plurality of fault patterns before the display panel is shut down.