Display Device Fluctuation Suppression Unit

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Solution Overview

Problem

Conventional display devices experience voltage fluctuations due to parasitic capacitance when transistors in the selector circuit change states, leading to incorrect grayscale voltage application and increased size and power consumption when attempting to cancel these fluctuations.

Innovation Solution

A display device with a data signal generation unit, transistors for time-sharing data signal distribution, and a fluctuation suppression unit connected to the gate signal line, which uses a gate signal to cancel voltage fluctuations caused by feedthrough voltage, reducing the influence of feedthrough voltage and enabling downsizing and power saving.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a transistor is added between the selector circuit and the data signal line to cancel voltage fluctuation using anti-phase gate signal, then the voltage fluctuation caused by feedthrough voltage is reduced, but the display device is increased in size and power consumption due to the additional gate signal line

Engineering Contradiction:
Improvevoltage fluctuation cancellationVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the fluctuation suppression function with the existing gate signal line by applying the fluctuation suppression function to a gate signal line that controls one of the transistors in the time-sharing switching circuit. This merging approach eliminates the need for separate additional gate signal lines while maintaining the voltage fluctuation cancellation capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate signal line is given multiple functions: it not only controls the switching transistor but also provides fluctuation suppression by applying a gate signal that is inverted relative to other gate signals. This multi-functionality allows the same signal line to serve dual purposes without requiring additional dedicated lines for fluctuation suppression.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a transistor is added between the selector circuit and the data signal line to cancel voltage fluctuation using anti-phase gate signal, then the voltage fluctuation caused by feedthrough voltage is reduced, but the display device consumes more power due to the additional gate signal line

Engineering Contradiction:
Improvevoltage fluctuation cancellationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines the fluctuation suppression function with the existing gate signal line by applying the fluctuation suppression function to a gate signal line that controls one of the transistors in the time-sharing switching circuit. This merging approach eliminates the need for separate additional gate signal lines while maintaining the voltage fluctuation cancellation capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate signal line is given multiple functions: it not only controls the switching transistor but also provides fluctuation suppression by applying a gate signal that is inverted relative to other gate signals. This multi-functionality allows the same signal line to serve dual purposes without requiring additional dedicated lines for fluctuation suppression.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If transistors in the selector circuit change from ON state to OFF state, then data signal distribution is achieved, but feedthrough voltage is generated due to parasitic capacitance causing voltage fluctuation in the data signal

Engineering Contradiction:
Improvedata signal distributionVSAvoidgrayscale voltage accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by generating a gate signal that is inverted relative to other gate signals and applying it to one of the transistors. This inverted gate signal proactively counteracts the feedthrough voltage effect before it can cause significant voltage fluctuation in the data signal, thereby maintaining grayscale voltage accuracy.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent converts the harmful feedthrough voltage effect into a beneficial cancellation mechanism. By applying an inverted gate signal to one transistor, the parasitic capacitance effects are made to counterbalance each other, transforming the harmful voltage fluctuation into a self-cancelling effect that maintains signal integrity.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses voltage fluctuations, maintaining data signal potential until write timing, ensuring accurate grayscale voltage application to pixel electrodes without requiring additional signal lines, thus reducing the display device's size and power consumption.

Implementation Method 1

when a transistor included in the selector circuit changes from the ON state to the OFF state, a feedthrough voltage is generated due to the parasitic capacitance of the transistor

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS9105209B2Display device
Publication Date: 2015.08.11 PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA
  • US9105209B2 patent drawing
  • US9105209B2 patent drawing
  • US9105209B2 patent drawing

AI summary

In a liquid crystal display device, a data signal generation unit generates a data signal for controlling the orientation of liquid crystal. A plurality of transistors supply the data signal output from a source IC unit to a plurality of data signal lines of a liquid crystal display panel in a time sharing manner. A gate signal line controls each of the plurality of transistors. A fluctuation suppression unit is connected to the gate signal line that controls any one of the plurality of transistors, and suppresses, in accordance with a gate signal of the connected gate signal line, a voltage fluctuation in the data signal which occurs when another transistor changes from the ON state to the OFF state.