Display Device Frame Memory Noise Malfunction Detection

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Solution Overview

Problem

Display devices with dynamic random access memory (DRAM) as frame memory often malfunction due to noise, leading to abnormal displays, as malfunctions in DRAM cannot be detected unless specific processes are performed.

Innovation Solution

A display device and method that includes a display control circuit to check the normalcy of the frame memory by writing partial video data replaced with test data and comparing it with data read from the memory, and resetting the memory if abnormal, using a DRAM with a reset function.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If DRAM is used as frame memory, then productivity and functionality are improved, but reliability deteriorates due to noise-induced malfunctions

Engineering Contradiction:
Improvedisplay processing capabilityVSAvoidframe memory stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a check process before normal display operations to detect potential DRAM malfunctions. The display control circuit writes test data to the frame memory and reads it back to verify integrity, preventing abnormal displays before they occur by resetting the frame memory when issues are detected in advance.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If frame memory check process is implemented, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveframe memory stabilityVSAvoidcontrol circuit functionality
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the frame memory check process with the existing display control circuit, combining the verification function with the normal display processing. The display control circuit performs both regular video signal processing and frame memory integrity checks, eliminating the need for separate dedicated check circuits and reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If frame memory is reset frequently, then reliability is improved, but loss of time increases

Engineering Contradiction:
Improvedisplay normalcyVSAvoidreset operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements feedback by continuously monitoring frame memory integrity through read-back verification and using this information to control reset operations. The display control circuit reads stored data, compares it with expected values, and only resets the frame memory when actual abnormalities are detected, rather than resetting periodically or preemptively, thus minimizing unnecessary time loss.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10854167B2Display device and method for controlling the same
Publication Date: 2020.12.01 SHARP KK
  • US10854167B2 patent drawing
  • US10854167B2 patent drawing
  • US10854167B2 patent drawing

AI summary

A display device includes a display panel, a frame memory, a display control circuit that performs a predetermined process on a first video signal using the frame memory and outputs an obtained second video signal, and a panel drive circuit that drives the display panel based on the second video signal. The display control circuit checks whether the frame memory is normal or abnormal, by storing partial video data included in the first video signal, writing to the frame memory, video data obtained by replacing the partial video data with first test data, and comparing with the first test data, second test data included in the video data read from the frame memory.