Display Gate Driver with Single-Register Pixel Sensing
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Solution Overview
Problem
Conventional display devices face limitations in area and power consumption due to the need for a separate sensing shift register to perform pixel sensing operations during the vertical blank period, which is short, leading to luminance deviations and afterimages.
Innovation Solution
A display device and method that utilizes a single shift register to perform both writing and sensing modes by modulating the clock signal cycle and output enable signals, with distinct pulse widths in the active and vertical blank periods, allowing for efficient pixel characterization without additional hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate sensing shift register is added to perform sensing operations during the vertical blank period, then pixel sensing capability is improved, but device area and power consumption increase
Solution Approach 1:
The existing shift register is designed to perform multiple functions: it sequentially applies scan signals during the active period and sensing signals during the vertical blank period. This multi-functional design eliminates the need for a separate sensing shift register, resolving the contradiction between sensing capability and device area by making one component serve dual purposes at different time intervals.
Solution Approach 2:
The shift register operates in periodic cycles, switching between writing mode (active period) and sensing mode (vertical blank period) based on the frame period timing. This periodic operation allows the same hardware to perform different functions at different times, enabling sensing capability without adding permanent additional components that would increase device area.
2Reliability
If a separate sensing shift register is added to perform sensing operations, then pixel sensing capability is improved, but power consumption increases
Solution Approach 1:
The single shift register is controlled to perform both writing and sensing operations through modulation of the clock signal cycle and output enable signals. By reusing the same hardware resource instead of adding a separate sensing shift register, the total power consumption is reduced while maintaining full sensing capability.
Solution Approach 2:
The shift register discards its writing function temporarily during the vertical blank period to perform sensing operations, and recovers the writing function in the next active period. This time-based resource allocation allows one component to handle both functions sequentially, avoiding the need for dual registers and the associated power consumption of operating two separate circuits simultaneously.
3Reliability
If the vertical blank period is used for sensing operations, then pixel characterization is enabled, but the short duration limits sensing performance
Solution Approach 1:
The shift register is configured to start sensing operations in advance within the vertical blank period, maximizing the utilization of available sensing time. By carefully timing the sensing operation to begin as early as possible in the vertical blank period and using pulse width modulation to extend the effective sensing window, the system optimizes pixel characterization within the constrained time available.
Data Source
AI summary
A display device includes a display panel including a plurality of pixel rows, a driving controller that generates a clock signal and a gate driver that provides scan signals and sensing signals to the plurality of pixel rows in response to the clock signal, wherein the clock signal includes a plurality of first pulses in an active period of a frame period and a plurality of second pulses in a vertical blank period of the frame period, and a width of at least one of the plurality of second pulses is different from a width of each of the plurality of first pulses.