Display Substrate Gate Driving Circuit with Dual Clock Lines

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Solution Overview

Problem

The existing gate driving circuits in OLED displays are complex, leading to high chip area requirements, which hinder high resolution and narrow frame requirements, and suffer from leakage issues that affect voltage levels, preventing effective compensation signals.

Innovation Solution

A display substrate with a gate driving circuit comprising cascaded shift register units, utilizing dual clock signal lines to maintain voltage levels and reduce leakage, allowing for efficient signal transmission and compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a complex gate driving circuit with three sub-circuits is used, then the circuit can output composite pulses, but the chip area increases and resolution requirements cannot be met

Engineering Contradiction:
Improvecircuit structure complexityVSAvoidchip area
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

The patent merges the detection circuit and display circuit into a single integrated circuit structure. The gate driving circuit directly outputs composite pulses combining detection and display functions, eliminating the need for separate sub-circuits and reducing overall chip area while maintaining high resolution performance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate driving circuit is designed to perform multiple functions simultaneously - it acts as both a detection circuit and a display circuit, outputting composite pulses that serve dual purposes. This multi-functional design reduces the number of separate components needed, thereby reducing chip area

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If a single clock signal line is used, then the circuit is simpler, but voltage leakage occurs and compensation signals cannot be effectively generated

Engineering Contradiction:
Improvesignal line structureVSAvoidvoltage level stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the clock signal into two separate lines - a first clock signal line and a second clock signal line. This segmentation allows each line to serve specific functions: one for clock signals and another for compensation signals, preventing voltage leakage and ensuring stable voltage levels for effective compensation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a transmission circuit as an intermediary component that selectively transmits signals between the two clock signal lines. This intermediary structure enables the system to maintain voltage levels and prevent leakage while allowing flexible signal transmission for both clock and compensation functions

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12469460B2Display substrate and display device
Publication Date: 2025.11.11 HEFEI BOE ZHUOYIN TECH CO LTD
  • US12469460B2 patent drawing
  • US12469460B2 patent drawing
  • US12469460B2 patent drawing

AI summary

A display substrate and a display device are provided. The display substrate includes a base substrate, and a gate driving circuit and a plurality of signal lines arranged on the base substrate; the plurality of signal lines include a first clock sub-signal line and a second clock sub-signal line; an orthographic projection of the first clock sub-signal line on the base substrate and an orthographic projection of the second clock sub-signal line on the base substrate are arranged side by side, and the first clock sub-signal provided by the first clock sub-signal line is the same as the second clock sub-signal provided by the second clock sub-signal line.