Display Substrate Gate Driving Layout for Low-Frequency Flicker
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Solution Overview
Problem
Low-frequency flickering in intelligent terminal display devices, such as smartphones and tablets, results in unstable brightness and noticeable image flicker due to voltage changes in sub-pixel driving circuits, affecting user experience and power consumption.
Innovation Solution
A display substrate with multiple gate driving circuits, including first and second gate driving circuits, sharing signal lines and having different timing outputs, is designed to stabilize voltage and reduce frame width, thereby minimizing flicker and power consumption. The substrate includes a plurality of first gate driving circuits and second gate driving circuits, with shared signal lines and symmetric arrangements to optimize signal interference and reduce frame width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a single gate driving circuit is used, then the device complexity is reduced, but low-frequency flickering occurs and power consumption increases
Solution Approach 1:
The gate driving circuit is divided into multiple independent gate driving circuits (first gate driving circuit and second gate driving circuit) that operate with different timing. This segmentation allows each circuit to drive different scan lines at different times, reducing the overall power consumption while maintaining display functionality.
Solution Approach 2:
The patent implements periodic action by having the first and second gate driving circuits operate in alternating time periods. The first gate driving circuit drives odd-numbered scan lines during one period, while the second gate driving circuit drives even-numbered scan lines during another period, creating a time-division multiplexing effect that reduces power consumption.
2Stability of the object's composition
If a single gate driving circuit is used, then the device complexity is reduced, but low-frequency flickering occurs affecting brightness stability
Solution Approach 1:
The gate driving circuit is segmented into multiple independent circuits that operate simultaneously or alternately, ensuring continuous scanning of all pixel rows. This segmentation eliminates the low-frequency flickering that would occur with a single circuit by distributing the scanning load across multiple circuits with different timing.
Solution Approach 2:
The patent merges multiple gate driving circuits to work together on the same display panel, with each circuit responsible for specific scan lines. The combined operation of these circuits ensures continuous and stable image display, eliminating flickering while maintaining a relatively simple overall structure through shared signal lines.
3Reliability
If multiple gate driving circuits with different timing are used, then power consumption is reduced and flickering is minimized, but the device complexity increases
Solution Approach 1:
The patent applies universality by designing multiple gate driving circuits that share common signal lines and have identical internal structures. Each circuit can independently drive different scan lines, but they all use the same power supply lines and control signal lines, reducing the overall complexity despite having multiple functional units.
Solution Approach 2:
The patent resolves the complexity issue by adding a time dimension to the gate driving architecture. Instead of having all circuits operate simultaneously on the same lines, the circuits operate at different time periods, allowing them to share physical resources (signal lines, power lines) while maintaining independent functionality, thus reducing spatial complexity.
Data Source
AI summary
A display substrate, a method of manufacturing the same and a display substrate. The display substrate includes a plurality of first gate driving circuits and a plurality of second gate driving circuits, a first gate driving signal output by the first gate driving circuit and a second gate driving signal output by the second gate driving circuit have different timing; the first gate driving circuit and the second gate driving circuit share at least one signal line.