Display Substrate Gate-Line Layout for Uniform Sub-Pixel Brightness
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Solution Overview
Problem
In existing display technologies, sub-pixel circuits connected to the same row of gate lines exhibit uneven brightness, leading to poor display quality with half red and half green issues due to differential delays in gate line signal propagation.
Innovation Solution
A display substrate design where sub-pixel circuits of the same color are connected to different rows of gate lines, with separate drive modules providing gate drive signals from opposite ends of these rows, ensuring uniform brightness across the display area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If sub-pixel circuits of the same color in the same row are electrically connected to the same row of gate line, then the circuit structure is simple, but the brightness of far-end pixels is greater than near-end pixels, resulting in poor display quality
Solution Approach 1:
The gate lines are divided into multiple rows, and sub-pixel circuits of the same color in the same row are alternately connected to different rows of gate lines. Specifically, odd-column sub-pixel circuits are connected to odd-row gate lines while even-column sub-pixel circuits are connected to even-row gate lines. This segmentation of the gate line connection structure reduces signal propagation delay differences and achieves uniform brightness across the display area.
2Illumination intensity
If sub-pixel circuits are connected to different rows of gate lines with separate drive modules, then brightness uniformity is improved, but the device complexity increases
Solution Approach 1:
The display substrate is divided into multiple scanning regions, with each region having its own drive module. Each drive module independently controls a specific set of gate lines, allowing for localized optimization of drive signals. This segmentation approach improves brightness uniformity while managing overall system complexity through modular design.
Solution Approach 2:
The patent introduces a two-dimensional connection pattern where sub-pixel circuits are connected to gate lines based on both row and column parity. Odd-column sub-pixel circuits connect to odd-row gate lines, while even-column sub-pixel circuits connect to even-row gate lines. This dimensional approach to connection routing achieves uniform brightness distribution across the display area.
Data Source
AI summary
A display substrate includes a base substrate, a first drive module, a second drive module, an array of sub-pixel circuits, rows of gate lines, and columns of data lines. A portion of sub-pixel circuits having a first color in the same row are electrically connected to one row of the gate line, another portion of sub-pixel circuits having the first color in the same row are electrically connected to another row of the gate line. The first drive module is electrically connected to a first end of the row of gate line and the second drive module is electrically connected to a second end of the another row of gate line. The first end and the second end are opposite ends. In the sub-pixel circuits located in the same row, at least two sub-pixel circuits at the same side of the data line are electrically connected to the data line.