Display Panel Gate Line Layout for Faster Switching Response

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Solution Overview

Problem

The RC loading of gate lines in display panels results in slow response speed and short response time for switching transistors, affecting the display effect, particularly in large-size panels with high pixel density.

Innovation Solution

The display panel design includes a first conductive layer with a molybdenum layer and a third conductive layer with a titanium-aluminum-titanium structure, reducing the square resistance of signal lines and minimizing impedance load, and a capacitor configuration to stabilize gate voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a gate line is used to provide gate driving signal to switching transistor, then the switching transistor can be controlled, but the RC loading of the gate line causes slow response speed and short response time

Engineering Contradiction:
Improveresponse speed of switching transistorVSAvoidresponse time of switching transistor
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent introduces a third conductive layer above the first conductive layer to form signal lines. This vertical stacking approach (adding a dimension) allows the signal lines to be positioned closer to the switching transistor gates, reducing the RC loading effect and improving response speed without increasing horizontal trace length.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses different material compositions for different conductive layers. The first conductive layer uses molybdenum while the third conductive layer uses aluminum-based materials with lower resistance. This composite material approach optimizes both mechanical stability and electrical performance to reduce RC loading.

Inventive Principle:
Principle #40Composite materials

2Speed

If the square resistance of conductive layer is reduced to improve signal transmission, then the response speed improves, but the device complexity increases

Engineering Contradiction:
Improveresponse speed of switching transistorVSAvoidcomplexity of conductive layer structure
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent divides the conductive structure into multiple separate layers (first conductive layer, third conductive layer) with different functions. The first layer provides structural support and partial conduction, while the third layer provides low-resistance signal paths. This segmentation allows optimization of each layer independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first conductive layer serves multiple functions: it provides structural support, forms partial signal paths, and serves as a base for the third conductive layer. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260020464A1Display panel and display device
Publication Date: 2026.01.15 HEFEI BOE ZHUOYIN TECH CO LTD
  • US20260020464A1 patent drawing
  • US20260020464A1 patent drawing
  • US20260020464A1 patent drawing

AI summary

The display panel comprises a pixel driving circuit; the pixel driving circuit comprises a switching transistor; the display panel further comprises a base substrate, a first conductive layer, and a third conductive layer which are sequentially stacked; the first conductive layer is located on one side of the base substrate, and at least part of the first conductive layer is used for forming a gate of the switching transistor; the third conductive layer is located on the side of the first conductive layer facing away from the base substrate, the third conductive layer comprises a second signal line, and the second signal line is connected to the gate of the switching transistor by means of a via hole; the square resistance of the third conductive layer is less than the square resistance of the first conductive layer.