Display Panel Gate Driving to Suppress TFT Threshold Shift

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Solution Overview

Problem

Conventional display devices using amorphous silicon transistors face issues with threshold voltage shifts, leading to malfunction, and require reduction in power consumption and the number of connections to the driver IC, while also increasing in size and complexity.

Innovation Solution

The solution involves alternately applying positive and negative power sources to the gate electrode of transistors using switching transistors, with a clock signal input to one switching transistor and an inverted clock signal to another, to suppress threshold voltage shifts and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If amorphous silicon transistors are used in display devices, then manufacturing cost is reduced and ease of manufacture is improved, but threshold voltage shifts occur leading to device malfunction and reliability deterioration

Engineering Contradiction:
Improveease of manufactureVSAvoidreliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by introducing a countermeasure circuit that actively compensates for threshold voltage shifts before they cause malfunction. The circuit includes a compensation transistor and capacitor that detect and correct threshold voltage changes in advance, preventing device failure while maintaining the use of amorphous silicon transistors for easy manufacturing

Inventive Principle:
Principle #9Preliminary anti-action

2Device complexity

If conventional shift register circuits are used, then device complexity is maintained at acceptable levels, but power consumption is high and the number of connections to driver IC increases

Engineering Contradiction:
Improvedevice complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent merges the shift register functionality with compensation circuits into an integrated structure. By combining the clock signal input, reset signal input, and threshold voltage compensation mechanisms within a unified circuit architecture, the patent reduces the number of separate connections to the driver IC and lowers overall power consumption while maintaining manageable device complexity

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If transistors remain on during non-selection periods, then circuit operation is maintained, but power consumption increases and threshold voltage shifts worsen

Engineering Contradiction:
ImprovereliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by controlling transistors to switch between on and off states based on clock cycles and selection periods. During non-selection periods, transistors are turned off to reduce power consumption and minimize threshold voltage shifts, while maintaining circuit readiness through periodic resetting and compensation mechanisms that ensure reliable operation when needed

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12107092B2Display device
Publication Date: 2024.10.01 SEMICON ENERGY LAB CO LTD
  • US12107092B2 patent drawing
  • US12107092B2 patent drawing
  • US12107092B2 patent drawing

AI summary

To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.