Display Panel GOA Reset Wiring for Single-Cut Panel Separation
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Solution Overview
Problem
The need to re-cut connections between drain electrodes of reset transistors in GOA units during panel cutting leads to low cutting efficiency and yield rate issues in display panels.
Innovation Solution
The design involves disconnecting the gate electrodes of K reset transistors from a first metal wiring and connecting them to a reset signal line, with the first metal wiring and reset signal line in a disconnection state, allowing for a single cut to address these issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each GOA unit comprises a reset transistor connected to a signal line of preset low voltage level, then the gate drive circuit can correctly reset the gate signal to initial state, but the cutting efficiency decreases and panel yield rate is affected due to the need to re-cut multiple drain electrode connections
Solution Approach 1:
The patent divides the gate drive circuit into two segments: the first N GOA units (pre-charging area) without reset transistors, and the remaining GOA units with reset transistors. This segmentation eliminates the need for multiple re-cuts in the pre-charging area while maintaining reset functionality where needed, thus improving cutting efficiency without compromising gate signal reset correctness.
Solution Approach 2:
The patent extracts the reset transistor from the first N GOA units, removing the unnecessary component that would require re-cutting. This extraction eliminates the harmful factor of multiple cuts in the pre-charging area while preserving the reset transistor in areas where it is actually needed for correct gate signal resetting.
2Adaptability or versatility
If multiple cuts are performed to disconnect drain electrodes from signal lines, then the connection between reset transistors and signal lines can be adjusted, but the panel yield rate decreases due to impact on other wirings
Solution Approach 1:
By segmenting the gate drive circuit into pre-charging units without reset transistors and normal units with reset transistors, the patent reduces the number of required cuts from multiple to just one. This segmentation maintains the adaptability of connection configuration while minimizing the risk to other wirings, thus improving panel yield rate.
Solution Approach 2:
The patent performs preliminary design of the GOA circuit structure during the manufacturing process, pre-determining which units will have reset transistors and which will not. This preliminary action eliminates the need for multiple post-manufacturing cuts, thereby protecting other wirings from damage and improving panel yield rate while maintaining configuration flexibility.
Data Source
AI summary
Embodiments of this application provide a display panel and a display terminal. The display panel comprises M rows of pixels; and M cascaded gate drive circuits, each of the gate drive circuits being connected to a row of the pixels, and each of the gate drive circuits comprising a reset transistor. Gate electrodes of K reset transistors arranged successively are connected to a first metal wiring, gate electrodes of M−K reset transistors arranged successively are connected to a reset signal line, and the first metal wiring and the reset signal line are in a disconnection state, where M and K are positive integers, and K<M.