Display-Area Hole Data Line Layering for Uniform Luminance

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Solution Overview

Problem

The formation of a hole in the display area of a display device leads to dead space and non-uniform luminance due to the need for lines to bypass the hole, resulting in inefficient use of space and potential luminance differences.

Innovation Solution

The implementation of first and second data lines on multiple layers in the hole edge area, with specific layering and arrangement to minimize space occupation and ensure uniform luminance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If lines are disposed adjacent to the edge of the hole to bypass it, then the hole can be formed in the display area, but dead space is caused and luminance uniformity deteriorates

Engineering Contradiction:
Improvehole formation capabilityVSAvoiddead space and luminance non-uniformity
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies multi-layer stacking to arrange data lines in the vertical dimension rather than only in the horizontal plane. Specifically, first data lines are disposed on a first layer and second data lines are disposed on a second layer above the first layer, allowing both sets of lines to bypass the hole without occupying the same horizontal space, thereby eliminating dead space and maintaining luminance uniformity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the data line routing into multiple independent layers. By dividing the data line function across first data lines on a first layer and second data lines on a second layer, each layer can be independently optimized to bypass the hole edge without interfering with the other, resolving the conflict between hole formation and dead space prevention.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple sets of data lines are arranged in the same plane, then connectivity to pixels is maintained, but space occupation increases and dead space is created

Engineering Contradiction:
Improvepixel connectivityVSAvoidspace occupation in hole edge area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from two-dimensional planar arrangement to three-dimensional multi-layer arrangement. First data lines are disposed on a first layer and second data lines are disposed on a second layer vertically above the first layer, allowing multiple data line sets to coexist without horizontal overlap, thereby maintaining pixel connectivity while minimizing space occupation in the hole edge area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If data lines are aggregated in the hole edge area, then routing flexibility is improved, but luminance uniformity may deteriorate

Engineering Contradiction:
Improverouting flexibilityVSAvoidluminance uniformity
Core Design Contradiction:
Ease of operationVSIllumination intensity

Solution Approach 1:

The patent uses vertical layering to separate first data lines on a first layer from second data lines on a second layer. This spatial separation in the vertical dimension allows both line sets to be aggregated near the hole edge for routing flexibility while preventing horizontal overlap that would cause luminance non-uniformity, as each layer's lines are independently positioned.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12389765B2Display device having a hole formed in a display area
Publication Date: 2025.08.12 SAMSUNG DISPLAY CO LTD
  • US12389765B2 patent drawing
  • US12389765B2 patent drawing
  • US12389765B2 patent drawing

AI summary

A display device including a substrate, a plurality of first data lines and a plurality of second data lines. The substrate includes a display area, in which a hole is formed, and a hole edge area surrounding the hole. The plurality of first data lines are disposed on the substrate, extend in a first direction in the display area, are arranged in a second direction orthogonal to the first direction, and bypass the hole along the hole edge area. The plurality of second data lines are disposed on the substrate, extend in the first direction in the display area, are arranged adjacent to the plurality of first data lines, and bypass the hole along hole edge area. In the hole edge area, each of the plurality of first data lines and the plurality of second data lines are disposed on three layers different from each other.