Display HPD Circuit With Early High-Level Signal for BIOS Startup

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Solution Overview

Problem

The existing HPD circuit of a display fails to set the HPD signal to a high level immediately, leading to the inability to display a BIOS screen normally due to hardware and software delays between the computer host and the display.

Innovation Solution

An HPD circuit with a delay control module is introduced, which receives a second control signal to generate and output a second detection signal set to a high level, thereby minimizing software delay and ensuring the HPD signal is set to a high level as soon as possible.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the HPD circuit uses traditional control signal timing, then the software initialization process can be completed, but the HPD signal cannot be set to high level immediately, causing BIOS screen display failure

Engineering Contradiction:
ImproveBIOS screen display reliabilityVSAvoidHPD signal activation delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The delay control module is configured to set the HPD signal to high level in advance before the main control module completes its initialization. Specifically, when the second control signal is low, the delay control module activates the HPD signal early, allowing the BIOS screen to be displayed. After the main control module finishes initialization and outputs the first control signal, the delay control module turns off the HPD signal. This preliminary action resolves the contradiction by ensuring the HPD signal is active early enough for BIOS display while maintaining proper initialization sequencing.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If software delay is minimized through optimization, then HPD signal can be set to high level faster, but the improvement method becomes complicated requiring repeated verification

Engineering Contradiction:
Improvesoftware delayVSAvoidsoftware optimization complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent introduces a delay control module as an intermediary component between the control signals and the HPD signal output. This module includes a delay control unit with switching elements (first switching element and second switching element) that are controlled by first and second control signals respectively. The intermediary module simplifies the overall system by providing a dedicated hardware mechanism for timing control, eliminating the need for complex software optimization and repeated verification while achieving precise control over when the HPD signal is activated.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If hardware delay of power system is reduced, then HPD signal activation is faster, but improvement cost is high

Engineering Contradiction:
Improvehardware delayVSAvoidimprovement cost
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

Instead of modifying the hardware delay characteristics of the power system (which would be costly), the patent changes the operational parameters by introducing a delay control module that can dynamically control the HPD signal timing. The module uses control signals to switch between different operational states, effectively adjusting the timing parameter without requiring hardware modifications to the power system itself. This approach achieves faster HPD signal activation at low cost by changing control parameters rather than hardware characteristics.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12236146B2HPD circuit of display, working method, integrated circuit and electronic equipment
Publication Date: 2025.02.25 QISDA SUZHOU
  • US12236146B2 patent drawing
  • US12236146B2 patent drawing
  • US12236146B2 patent drawing

AI summary

An HPD circuit of a display, a working method, an integrated circuit and electronic equipment, related to the field of display interfaces. The HPD circuit of a display includes a main control module configured to receive a first control signal from the display, generate a first detection signal based on the first control signal and output the first detection signal to a display interface; and a delay control module configured to receive a second control signal from the display, generate a second detection signal based on the second control signal, set the second detection signal to a high level, and output the second detection signal to the display interface. According to the embodiments, the software delay of a display can be effectively shortened, and an HPD signal can be set to a high level as soon as possible.