Display Substrate Insulation Stack for Lower Pixel Driving Voltage

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Solution Overview

Problem

Conventional liquid crystal display substrates have a large distance between the first electrode layer and the second electrode layer, leading to high pixel driving voltage and logic power consumption, which affects the display's performance and transmittance.

Innovation Solution

The display substrate design includes a first insulation layer between the source/drain metal layer and the first electrode layer, with a via hole in the second insulation layer to reduce the distance between the first and second electrode layers, and a second electrode layer with a connection member that is electrically coupled to both layers, optimizing the pixel driving voltage and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a large distance is maintained between the first and second electrode layers, then the insulation performance is improved, but the pixel driving voltage increases and power consumption increases

Engineering Contradiction:
Improveinsulation performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent divides the insulation structure into multiple layers (first insulation layer, second insulation layer, third insulation layer) with different thicknesses and material properties. The second insulation layer is made thinner (200-800nm) to reduce voltage, while other layers maintain adequate insulation, thus segmenting the insulation function across different layers to simultaneously achieve low voltage and sufficient insulation performance.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a via hole is formed to directly couple the first electrode layer and source/drain metal layer, then the electrical connection is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The via hole is formed through the second insulation layer before the third insulation layer is deposited. This preliminary action allows the via hole to be pre-positioned and aligned with the electrode patterns, ensuring proper electrical connection while simplifying the overall manufacturing process by separating the via formation step from the subsequent insulation layer deposition.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If the second insulation layer thickness is reduced to 200-800 nm, then the pixel driving voltage is reduced, but the insulation performance may be compromised

Engineering Contradiction:
Improvepixel driving voltageVSAvoidinsulation performance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent employs composite insulation structures with different material compositions in different layers. The second insulation layer uses a specific material or combination of materials optimized for thin-film applications, allowing it to provide adequate insulation performance at reduced thickness (200-800nm), thus enabling lower pixel driving voltage without compromising overall insulation reliability.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20240170496A1Display substrate, display device and manufacturing method of the display substrate
Publication Date: 2024.05.23 BEIJING BOE DISPLAY TECH CO LTD
  • US20240170496A1 patent drawing
  • US20240170496A1 patent drawing
  • US20240170496A1 patent drawing

AI summary

A display substrate, a display device and a manufacturing method thereof. The display substrate includes a base substrate, and a gate electrode layer, a gate insulation layer, an active layer and a source/drain metal layer laminated one on another on the base substrate. The display substrate further includes a first insulation layer arranged between the gate insulation layer and the second insulation layer and a second electrode layer arranged at a side of the second insulation layer away from the base substrate. The second electrode layer includes a second electrode pattern, the source/drain metal layer includes a data line pattern, an orthogonal projection of the first electrode layer onto the base substrate partially overlaps an orthogonal projection of the second electrode pattern onto the base substrate, and the first electrode layer or the second electrode pattern is electrically coupled to the data line pattern.