Display Layer Planarization for Conductive Height Differences
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Solution Overview
Problem
Existing display devices face challenges in achieving high-resolution images and reliability, particularly in the context of conductive layers with height differences that affect electrical properties and structural integrity.
Innovation Solution
The implementation of a planarization layer over an inorganic interlayer dielectric layer, which compensates for height differences between conductive patterns, and a method involving an etch-back process to form an opening, ensuring a uniform and reliable display device structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple conductive layers are disposed on the gate insulator to achieve high-resolution images, then the manufacturing precision is improved, but the height differences between conductive layers cause structural integrity issues and reliability problems
Solution Approach 1:
An inorganic interlayer dielectric layer is introduced as an intermediary between the conductive layers and the planarization layer. This interlayer dielectric layer fills the gaps and height differences between the conductive layers, providing mechanical support and structural integrity while maintaining the high-resolution image quality achieved through the multiple conductive layers configuration.
Solution Approach 2:
The patent employs a composite structure combining conductive layers with an inorganic interlayer dielectric layer and an organic planarization layer. This composite material approach allows each layer to contribute its specific properties: the conductive layers provide electrical functionality for high resolution, the inorganic interlayer dielectric provides structural support and fills height differences, and the organic planarization layer provides surface flatness, collectively resolving the contradiction between manufacturing precision and reliability.
2Reliability
If the interlayer dielectric layer is disposed to cover the entire substrate including lateral side surfaces of conductive layers, then the structural integrity is improved, but the device complexity increases
Solution Approach 1:
The inorganic interlayer dielectric layer is extended into the vertical dimension to cover the lateral side surfaces of the conductive layers, not just the top surfaces. This three-dimensional coverage approach provides comprehensive structural support and fills height differences from all directions, enhancing structural integrity while the subsequent planarization process manages the added complexity.
Solution Approach 2:
The inorganic interlayer dielectric layer is formed beforehand to cover and fill the height differences between conductive layers before the planarization layer is applied. This preliminary action creates a more uniform base structure, reducing the complexity burden on subsequent fabrication steps by pre-resolving the height variation issues.
3Manufacturing precision
If an etch-back process is used to form openings in the planarization layer, then the manufacturing precision is improved, but the device complexity increases
Solution Approach 1:
The mechanical drilling or punching method for forming openings is replaced with an etch-back process that uses chemical or plasma-based mechanisms. This substitution enables more precise control over opening dimensions and positions, achieving higher manufacturing precision while the self-aligned nature of the etch-back process helps manage the added fabrication complexity.
Data Source
AI summary
A display device includes a substrate having a transistor disposed thereon. A gate insulator is disposed on the transistor. A plurality of conductive layers is disposed on the gate insulator. The plurality of conductive layers is spaced apart from one another. An interlayer dielectric layer is disposed on the plurality of conductive layers. The interlayer dielectric layer comprises an inorganic material. A planarization layer is disposed on the interlayer dielectric layer and defines an opening. The opening exposes the interlayer dielectric layer. The planarization layer comprises an inorganic material. 1