Display Driver Level Shift Circuit for Faster Buffer Switching
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Solution Overview
Problem
Existing level shift circuits in display driver integrated circuits face challenges in efficiently shifting logic signals to input/output signals across different voltage levels, leading to reduced switching speed and increased transistor size requirements due to the use of a single manufacturing process for multiple voltage operations, which complicates the manufacturing process and increases costs.
Innovation Solution
A level shift circuit is designed with an output buffer composed of P-type and N-type transistors, where the gate signal for the P-type transistor is set to a negative potential lower than the negative-side power source and the gate signal for the N-type transistor is set to a positive potential higher than the positive-side power source, utilizing a first and second level shifter to extend the amplitude level of signals to the negative and positive sides respectively, allowing for enhanced driving ability without additional manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single manufacturing process is used for transistors operating at different voltages, then the manufacturing process is simplified, but the transistor driving ability and switching speed are reduced
Solution Approach 1:
The patent applies local quality by creating regions with different impurity concentrations within the same semiconductor substrate. Specifically, it forms a first region with a first impurity concentration for transistors requiring high breakdown voltage and a second region with a second impurity concentration for transistors requiring high driving ability. This allows each transistor to be optimized for its specific voltage requirement while using a unified manufacturing process, thereby resolving the contradiction between manufacturing simplicity and transistor performance.
2Power
If transistor size is increased to enhance driving ability, then sufficient gate voltage and current are provided, but the transistor area increases
Solution Approach 1:
The patent changes the impurity concentration parameter to enhance transistor driving ability without increasing transistor area. By forming a second region with a higher impurity concentration than the first region, the transistors in the second region achieve higher driving ability and switching speed due to the modified electrical properties. This allows sufficient gate voltage and current supply while maintaining compact transistor dimensions, thus resolving the contradiction between driving ability and transistor area.
3Adaptability or versatility
If multiple power sources with different voltages are used, then optimal operation for different functions is achieved, but the device complexity increases
Solution Approach 1:
The patent applies universality by designing a unified semiconductor device structure that can accommodate multiple power sources with different voltages. The device includes regions with different impurity concentrations that can operate with different power source voltages simultaneously. This allows the same device to handle logic signals, grayscale voltages, and input/output signals with different voltage levels without requiring separate dedicated structures for each function, thereby reducing overall device complexity while maintaining voltage compatibility.
Data Source
AI summary
A level shift block of a level shift circuit includes a level shifter by which an amplitude level of a signal to drive a P-type transistor is extended to a negative side, and a level shifter by which an amplitude level of a signal to drive an N-type transistor is extended to a positive side.