Display Panel Line Layout for Reliable Voltage Measurement

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Solution Overview

Problem

The increasing integration of elements in display panels leads to a larger area occupied by signal lines, reducing the available display area and increasing resistance, which affects the reliability of voltage measurement and overall performance.

Innovation Solution

A display device design that includes a base substrate with a display area and a non-display area, featuring insulating layers, voltage pads, and lines that overlap the display area, with specific line configurations and materials to reduce resistance and enhance voltage measurement reliability, such as using aluminum and titanium for the lines and insulating layers to cover the lines and pixel circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of signal lines increases to support higher integration, then the functionality and integration degree improve, but the area occupied by signal lines increases, reducing the display area

Engineering Contradiction:
Improveintegration degreeVSAvoiddisplay area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent utilizes multi-layer routing with insulating layers to route signal lines in three-dimensional space rather than confined to a single plane. Transfer lines extend in a second direction crossing the first direction, enabling signals to traverse vertically through multiple layers, thereby reducing the horizontal footprint and maximizing the display area while maintaining high integration capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the connection line length is reduced to minimize non-display area, then the display area increases, but the line resistance increases, degrading voltage measurement reliability

Engineering Contradiction:
Improvedisplay areaVSAvoidvoltage measurement reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The connection lines are constructed using composite material structures with multiple metal layers and patterns. The first lines and second lines are formed with conductive materials having low resistivity, and the multi-layer configuration provides parallel conduction paths that reduce overall line resistance even when the physical length is minimized.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent routes connection lines through multiple insulating layers, utilizing the vertical dimension to create three-dimensional conduction paths. Transfer lines extend in a second direction crossing the first direction, enabling short horizontal connections while maintaining low resistance through optimized multi-layer routing geometry.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If more insulating layers are added to route lines in multiple directions, then the line resistance decreases and routing flexibility improves, but the device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveline resistanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the routing function into separate segments across multiple insulating layers. First lines extend in a first direction on one layer, while second lines and transfer lines extend in a second direction on other layers. This segmentation allows independent optimization of each routing segment, reducing overall complexity while achieving low resistance through multi-layer parallel paths.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4401140A1Display device
Publication Date: 2024.07.17 SAMSUNG DISPLAY CO LTD
  • EP4401140A1 patent drawingFigure 1
  • EP4401140A1 patent drawingFigure 2
  • EP4401140A1 patent drawingFigure 3

AI summary

A display device includes a base substrate, a plurality of insulating layers located on the base substrate, a pad part including a first voltage pad, a second voltage pad, and a voltage measurement pad, a plurality of first lines extending in a first direction, and electrically connected to the first voltage pad, a plurality of second lines extending in the first direction, a first transfer line electrically connected to each of the plurality of first lines and extending in a second direction, and a second transfer line extending in the second direction, wherein the plurality of second lines include 2-1-th line and 2-2-th line, the 2-1-th line is electrically connected to the voltage measurement pad and electrically connected to the first transfer line, and the 2-2-th line is electrically connected to the second voltage pad and electrically connected to the second transfer line.