Dislocated Display Signal Lines to Reduce Crosstalk

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Solution Overview

Problem

In high-resolution display panels, the close spacing between power signal lines and data signal lines leads to significant coupling capacitance, causing signal interference and affecting display quality.

Innovation Solution

The display panel design includes first and second signal lines in the same metal layer but at different heights and distances from the base substrate, increasing the spacing between them to reduce coupling capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the power signal line and the data signal line are disposed in the same metal layer and extend in the same direction, then the manufacturing process is simplified, but the coupling capacitance between the signal lines increases causing signal interference

Engineering Contradiction:
Improvesignal line arrangementVSAvoidsignal interference
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent applies dimensionality change by transitioning from a two-dimensional planar arrangement to a three-dimensional dislocated arrangement. Specifically, the first and second signal lines are positioned at different heights (D1 and D2) within the same metal layer, creating vertical separation. This spatial dislocation in the third dimension reduces the coupling capacitance between signal lines while maintaining them in the same metal layer, thus resolving the contradiction between manufacturing simplicity and signal interference prevention.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If the spacing between the power signal line and the data signal line is decreased to achieve high resolution, then the display resolution is improved, but the coupling capacitance increases leading to signal crosstalk

Engineering Contradiction:
Improvedisplay resolutionVSAvoidsignal transmission quality
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent resolves this contradiction by introducing vertical dislocation between signal lines. By positioning signal lines at different heights (D1≠D2) within the same metal layer, the effective spacing between lines is increased in the vertical dimension while maintaining close horizontal spacing for high resolution. This reduces coupling capacitance and signal crosstalk without compromising display resolution.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent applies local quality by creating different spatial positions for different signal lines within the same metal layer. Specifically, the first signal line is positioned at height D1 and the second signal line at height D2, creating localized vertical separation. This local dislocation reduces coupling capacitance in specific regions where signal lines are closely spaced, thereby improving signal transmission quality while maintaining high display resolution.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12211856B2Display panelwith dislocated signal lines and display device with dislocated signal lines
Publication Date: 2025.01.28 WUHAN TIANMA MICRO ELECTRONICS CO LTD
  • US12211856B2 patent drawing
  • US12211856B2 patent drawing
  • US12211856B2 patent drawing

AI summary

Provided are a display panel and a display device. The display panel includes a base substrate, and a first signal line and a second signal line that are located on a side of the base substrate. Both the first signal line and the second signal line are located in a first metal layer and extend along a first direction. The distance between at least part of a surface of the first signal line facing the base substrate and a plane where the base substrate is located is defined by D1. The distance between at least part of a surface of the second signal line facing the base substrate and the plane where the base substrate is located is defined by D2, such that D2 is not equal to D1.