Display Device Compensation Memory for Uniform Luminance
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Solution Overview
Problem
Display devices experience degradation in image quality due to variations in luminance across different color channels and process deviations in pixels, leading to inconsistent image display.
Innovation Solution
A display device with a memory system that stores compensation signals for pixel blocks, utilizing a driving controller to compensate input image signals using multiple memories and correction value calculators for bilinear interpolation, ensuring accurate image output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single memory stores all compensation signals for the display panel, then the memory size must be large to accommodate all data, but this increases device complexity and cost
Solution Approach 1:
The patent divides the compensation signals into two groups: odd-numbered compensation signals and even-numbered compensation signals. The first memory stores odd-numbered compensation signals while the second memory stores even-numbered compensation signals. This segmentation allows the system to use two smaller memories instead of one large memory, reducing the complexity and cost of the memory system while maintaining the ability to store all necessary compensation data for the display panel.
2Speed
If the driving controller reads compensation signals sequentially from a single memory, then the reading speed is limited, but this simplifies the memory structure
Solution Approach 1:
By segmenting the compensation signals into odd and even groups stored in separate memories, the system enables parallel reading operations. The driving controller can simultaneously read odd-numbered compensation signals from the first memory and even-numbered compensation signals from the second memory, effectively doubling the reading speed compared to sequential access from a single memory, while keeping each memory unit relatively simple.
Solution Approach 2:
The parallel reading mechanism ensures that the driving controller can continuously obtain compensation signals without waiting for sequential access delays. Both memories operate simultaneously to provide compensation data, eliminating idle time in the compensation process and maintaining continuous useful action in the image signal processing pipeline.
Data Source
AI summary
A display device is disclosed that includes a display panel, a memory storing compensation signals respectively corresponding to blocks of the display panel, and a driving controller receiving an input image signal, compensating for the input image signal based on the compensation signals, and outputting an output image signal. The driving controller includes first to fourth memories storing the compensation signals from the memory. The compensation signals stored in the memory include first row compensation signals corresponding to blocks disposed at a first row among the blocks and second row compensation signals corresponding to blocks disposed at a second row among the blocks. Some of the first row compensation signals are stored in the first memory, and the others thereof are stored in the second memory. Some of the second row compensation signals are stored in the third memory, and the others thereof are stored in the fourth memory.


