Display Memory Bandwidth Reallocation During P-State Transitions
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Solution Overview
Problem
Adjusting operating parameters of memory subsystems in computing systems often results in memory blackout periods, causing visual artifacts due to interrupts or delays in display data, and skipping these adjustments leads to suboptimal performance or power consumption.
Innovation Solution
A control circuit manages memory bandwidth by prefetting display data before a power-performance state change, using increased bandwidth provided by a communication fabric to ensure continuous display data delivery during memory interface training, and adjusting bandwidth allocations accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If operating parameters of memory subsystem are adjusted to optimize performance or power consumption, then memory subsystem operates more efficiently, but visual artifacts occur due to memory blackout periods during training
Solution Approach 1:
The system performs preliminary actions by detecting when memory subsystem P-state changes are needed and initiating display data prefetching before the actual parameter adjustment occurs. The display controller prefetches display data into buffer memory during the period before memory blackout, ensuring continuous display operation when the memory subsystem undergoes training and becomes inaccessible.
2Use of energy by stationary object
If operating parameters of memory subsystem are adjusted to optimize power consumption, then power efficiency improves, but display data delivery is interrupted causing visual artifacts
Solution Approach 1:
The control circuit detects upcoming P-state changes and triggers the display controller to prefetch display data into buffer memory before the memory subsystem enters training mode. This preliminary prefetching ensures that display data delivery continues uninterrupted even when the memory subsystem adjusts its power consumption characteristics.
Solution Approach 2:
The buffer memory acts as an intermediary between the memory subsystem and display controller. During P-state changes when the memory subsystem is unavailable for training, the display controller can continue delivering display data from the buffer memory, mediating the interruption caused by memory blackout periods.
3Object-affected harmful factors
If memory bandwidth is increased to prevent display data interruptions, then visual artifacts are prevented, but memory bandwidth is wasted during periods when it is not needed
Solution Approach 1:
The system dynamically adjusts memory bandwidth allocation based on real-time conditions. The control circuit monitors for P-state change events and only increases memory bandwidth temporarily during the specific window when prefetching is needed before memory blackout. After prefetching completes or when P-state changes are not detected, the memory bandwidth returns to its original allocation, avoiding continuous waste of bandwidth resources.
Data Source
AI summary
An apparatus and method for efficiently managing memory bandwidth within a communication fabric. A computing system includes multiple clients, a display controller, and a communication fabric that transfers data between the multiple clients, the display controller, and a memory subsystem. A control circuit with power management circuitry determines that one or more conditions are satisfied for changing a power-performance state (P-state) of the memory subsystem. The control circuit asserts indications on a sideband interface specifying to the communication fabric that the display controller is to have an increased bandwidth of data transfer between the display controller and the memory subsystem. Using the increased bandwidth provided by the communication fabric, the display controller prefetches display data from a frame buffer of the memory subsystem prior to the P-state change. Afterward, the memory subsystem performs the P-state change and the corresponding training of the memory interface.