Display Device Memory Circuit Polarity Alternation
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Solution Overview
Problem
In liquid crystal display devices with digital memory pixels, simultaneous rewriting of memory contents across multiple source lines can cause significant voltage drops due to same-polarity signals, leading to data errors and increased power consumption, especially during still image or mixed still and moving image displays.
Innovation Solution
The display device employs parallel gate and source lines with first and second potential lines, and pixels connected through switches that store data based on different signal polarities, ensuring that adjacent pixels receive signals of opposite polarities, thereby reducing concurrent switching and voltage drops, and stabilizing memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If simultaneous rewriting of memory contents is performed across multiple source lines, then productivity is improved, but voltage drop increases and data errors occur
Solution Approach 1:
The patent implements periodic action by alternating the polarity of pixel signals between odd and even source lines in a systematic cycle. During memory rewriting operations, odd source lines receive positive polarity signals while even source lines receive negative polarity signals, and this pattern alternates between rewriting periods. This periodic polarity alternation prevents simultaneous same-polarity switching across all source lines, thereby maintaining high productivity while preventing voltage drops that would cause data errors.
Solution Approach 2:
The patent applies local quality by assigning different signal polarities to different spatial locations (odd versus even source lines) simultaneously. Instead of using a uniform signal polarity across all source lines during memory rewriting, the system provides locally differentiated polarities - positive polarity to odd source lines and negative polarity to even source lines. This local differentiation eliminates the voltage drop problem while maintaining simultaneous rewriting capability across all pixels.
2Reliability
If voltage is supplied to all source lines frequently for moving image display, then reliability is maintained, but power consumption increases
Solution Approach 1:
The patent utilizes periodic action by implementing frame-based polarity alternation where the signal polarity pattern switches between frames. During still image display periods, the system can reduce the frequency of voltage supply to source lines since the polarity pattern alternates periodically, allowing capacitive holding of pixel states. This periodic operation maintains display reliability while reducing average power consumption compared to continuous frequent voltage supply.
3Ease of operation
If same polarity signals are output to multiple source lines simultaneously, then ease of operation is simplified, but voltage drop and data errors increase
Solution Approach 1:
The patent resolves this contradiction by implementing periodic polarity alternation that automatically manages signal polarity assignment. The system maintains operational simplicity through systematic alternation between odd and even source line polarity groups, eliminating the need for complex real-time polarity management while preventing same-polarity simultaneous output that causes voltage drops. The periodic pattern ensures reliability without complicating the control mechanism.
Solution Approach 2:
The patent applies segmentation by dividing the source lines into two distinct groups based on polarity assignment - odd source lines form one group and even source lines form another group. This segmentation allows independent polarity control for each group, enabling simple yet reliable signal output management. By segmenting the source lines and assigning different polarities to different segments, the system maintains ease of operation while preventing voltage drop issues.
Data Source
AI summary
According to one embodiment, a first Pixel is connected to a first source line via a first switch included in a first Pixel and the second Pixel is connected to a second source line via a second switch included in the second Pixel. The first Pixel has a first memory, and the second Pixel has a second memory. A first potential line supplies data 1 and a second potential line supplies data 0. The first and second Pixels can store data 1 or 0, when a gate signal is applied to a gate line and the first and second switches are turned on. In this case, in order to store the same data (1 or 0) in the first and second memories, the first and second source lines should be applied different revel signals each other.