Display Module Leakage Current Reduction via Voltage Modulation

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Solution Overview

Problem

Display devices face flicker issues when using low refresh rates to conserve power, leading to reduced display effectiveness due to increased gate voltage voltage drops caused by leakage currents.

Innovation Solution

The display module incorporates a pixel circuit with reduced leakage currents through the use of compensation transistors and initial voltage management, where a high initial voltage is applied in the light-emitting phase to minimize source-drain voltage and channel width of transistors, thereby reducing flicker.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If a low refresh rate is used to display static pictures, then power consumption is reduced, but display flicker occurs and display effect is reduced

Engineering Contradiction:
Improvepower consumptionVSAvoiddisplay effect
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The patent changes the voltage parameter by applying a high initial voltage (ELVDD) to the gate of the driver transistor during the light-emitting phase. This voltage modulation reduces the source-drain voltage across the transistor, thereby reducing leakage current and minimizing display flicker while maintaining low refresh rate operation

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies the initial voltage ELVDD to the gate of the driver transistor before the light-emitting phase begins. This preliminary voltage application ensures that the transistor operates in a regime with reduced leakage current from the start of the light-emitting phase, preventing display flicker before it occurs

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a high refresh rate is used to display dynamic pictures, then dynamic blurring is reduced, but power consumption increases

Engineering Contradiction:
Improvedisplay qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent dynamically changes the voltage parameter ELVDD based on the display phase. During the light-emitting phase, the high initial voltage ELVDD is applied to reduce leakage current, while during other phases the voltage is reduced to ELVSS, thereby reducing overall power consumption while maintaining display quality

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the channel width of transistors is reduced to minimize leakage current, then display flicker is reduced, but transistor driving capability is weakened

Engineering Contradiction:
Improvedisplay stabilityVSAvoidtransistor driving capability
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent changes the voltage parameter by applying a high initial voltage (ELVDD) to the gate of the driver transistor during the light-emitting phase. This voltage modulation reduces the source-drain voltage across the transistor, thereby reducing leakage current and minimizing display flicker while maintaining low refresh rate operation

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies a preliminary high voltage to the gate of the driver transistor to counteract the harmful effect of leakage current before it can cause significant voltage drop and display flicker. This preliminary anti-action compensates for the reduced driving capability caused by narrower channel width

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11881173B2Display module and electronic device
Publication Date: 2024.01.23 HUAWEI TECH CO LTD
  • US11881173B2 patent drawing
  • US11881173B2 patent drawing
  • US11881173B2 patent drawing

AI summary

This application provide a display module and an electronic device, to reduce a probability of a display flicker. A display module includes a display, a display driver circuit, and at least one driver group; the display includes M rows of sub pixels; each driver group includes M gating circuits; an Nth gating circuit is configured to: receive a first initial voltage Vinit1 and a second initial voltage Vinit2 from the display driver circuit, output the second initial voltage Vinit2 to a second electrode of a first reset transistor and a first electrode of a voltage modulation transistor, and output the first initial voltage Vinit1 to the second electrode of the first reset transistor and the first electrode of the voltage modulation transistor.